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Message-Id: <1479511269-25834-2-git-send-email-waltfeasel@gmail.com>
Date: Fri, 18 Nov 2016 18:21:08 -0500
From: Walt Feasel <waltfeasel@...il.com>
To: lidza.louina@...il.com
Cc: markh@...pro.net, gregkh@...uxfoundation.org,
driverdev-devel@...uxdriverproject.org, devel@...verdev.osuosl.org,
linux-kernel@...r.kernel.org, Walt Feasel <waltfeasel@...il.com>
Subject: [PATCH 1/2] staging: dgnc: dgnc_neo.h Comment style modifications
Make modifications for comment style
Signed-off-by: Walt Feasel <waltfeasel@...il.com>
---
drivers/staging/dgnc/dgnc_neo.h | 24 +++++++++++-------------
1 file changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/staging/dgnc/dgnc_neo.h b/drivers/staging/dgnc/dgnc_neo.h
index 97f0386..1aa9325 100644
--- a/drivers/staging/dgnc/dgnc_neo.h
+++ b/drivers/staging/dgnc/dgnc_neo.h
@@ -18,14 +18,13 @@
#include "dgnc_driver.h"
-/************************************************************************
- * Per channel/port NEO UART structure *
- ************************************************************************
- * Base Structure Entries Usage Meanings to Host *
- * *
- * W = read write R = read only *
- * U = Unused. *
- ************************************************************************/
+/*
+ * Per channel/port NEO UART structure
+ * Base Structure Entries Usage Meanings to Host
+ *
+ * W = read write R = read only
+ * U = Unused.
+ */
struct neo_uart_struct {
u8 txrx; /* WR RHR/THR - Holding Reg */
@@ -48,9 +47,9 @@ struct neo_uart_struct {
u8 xonchar2; /* WR XON 2 - XOn Character 2 Reg */
u8 reserved1[0x2ff - 0x200]; /* U Reserved by Exar */
- u8 txrxburst[64]; /* RW 64 bytes of RX/TX FIFO Data */
+ u8 txrxburst[64]; /* RW 64 bytes of RX/TX FIFO Data */
u8 reserved2[0x37f - 0x340]; /* U Reserved by Exar */
- u8 rxburst_with_errors[64]; /* R 64 bytes of RX FIFO Data + LSR */
+ u8 rxburst_with_errors[64]; /* R 64 bytes of RX FIFO Data + LSR */
};
/* Where to read the extended interrupt register (32bits instead of 8bits) */
@@ -152,9 +151,8 @@ struct neo_uart_struct {
#define UART_17158_IER_RTSDTR 0x40 /* Output Interrupt Enable */
#define UART_17158_IER_CTSDSR 0x80 /* Input Interrupt Enable */
-/*
- * Our Global Variables
- */
+/* Our Global Variables */
+
extern struct board_ops dgnc_neo_ops;
#endif
--
2.1.4
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