lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Tue, 22 Nov 2016 17:18:20 +0000
From:   Lee Jones <lee.jones@...aro.org>
To:     Benjamin Gaignard <benjamin.gaignard@...aro.org>
Cc:     Lars-Peter Clausen <lars@...afoo.de>, robh+dt@...nel.org,
        Mark Rutland <mark.rutland@....com>, alexandre.torgue@...com,
        devicetree@...r.kernel.org,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Thierry Reding <thierry.reding@...il.com>,
        linux-pwm@...r.kernel.org, jic23@...nel.org, knaack.h@....de,
        Peter Meerwald-Stadler <pmeerw@...erw.net>,
        linux-iio@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Fabrice Gasnier <fabrice.gasnier@...com>,
        Gerald Baeza <gerald.baeza@...com>,
        Arnaud Pouliquen <arnaud.pouliquen@...com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Linaro Kernel Mailman List <linaro-kernel@...ts.linaro.org>,
        Benjamin Gaignard <benjamin.gaignard@...com>
Subject: Re: [PATCH 5/7] add bindings for stm32 IIO timer drivers

On Tue, 22 Nov 2016, Benjamin Gaignard wrote:

> [snip]
> >> +     "st,stm32-iio-timer5"
> >> +     "st,stm32-iio-timer6"
> >> +     "st,stm32-iio-timer7"
> >> +     "st,stm32-iio-timer8"
> >> +     "st,stm32-iio-timer9"
> >> +     "st,stm32-iio-timer10"
> >> +     "st,stm32-iio-timer11"
> >> +     "st,stm32-iio-timer12"
> >> +     "st,stm32-iio-timer13"
> >> +     "st,stm32-iio-timer14"
> >
> > We can't do this. This is a binding for a driver, not for the hardware.
> >
> 
> Unfortunately each instance for the hardware IP have little
> differences like which triggers they could accept or size of the
> counter register,
> and I doesn't have value inside the hardware to distinguish them so
> the only way I found is to use compatible.

Can't you represent these as properties?

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
Follow Linaro: Facebook | Twitter | Blog

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ