linux-kernel - Re: [PATCH 1/2] PM / Domains: Introduce domain-performance-state binding

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Message-ID: <m260nfz8mr.fsf@baylibre.com>
Date:   Tue, 22 Nov 2016 10:12:28 -0800
From:   Kevin Hilman <khilman@...libre.com>
To:     Viresh Kumar <viresh.kumar@...aro.org>
Cc:     Rob Herring <robh@...nel.org>, Rafael Wysocki <rjw@...ysocki.net>,
        linaro-kernel@...ts.linaro.org, linux-pm@...r.kernel.org,
        linux-kernel@...r.kernel.org, Mark Rutland <mark.rutland@....com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Vincent Guittot <vincent.guittot@...aro.org>,
        Lina Iyer <lina.iyer@...aro.org>, devicetree@...r.kernel.org,
        Stephen Boyd <sboyd@...eaurora.org>,
        Nayak Rajendra <rnayak@...eaurora.org>
Subject: Re: [PATCH 1/2] PM / Domains: Introduce domain-performance-state binding

Viresh Kumar <viresh.kumar@...aro.org> writes:

> On 21-11-16, 09:07, Rob Herring wrote:
>> On Fri, Nov 18, 2016 at 02:53:12PM +0530, Viresh Kumar wrote:
>> > Some platforms have the capability to configure the performance state of
>> > their Power Domains. The performance levels are represented by positive
>> > integer values, a lower value represents lower performance state.
>> > 
>> > The power-domains until now were only concentrating on the idle state
>> > management of the device and this needs to change in order to reuse the
>> > infrastructure of power domains for active state management.
>> > 
>> > This patch introduces a new optional property for the consumers of the
>> > power-domains: domain-performance-state.
>> > 
>> > If the consumers don't need the capability of switching to different
>> > domain performance states at runtime, then they can simply define their
>> > required domain performance state in their node directly. Otherwise the
>> > consumers can define their requirements with help of other
>> > infrastructure, for example the OPP table.
>> > 
>> > Signed-off-by: Viresh Kumar <viresh.kumar@...aro.org>
>> > ---
>> >  Documentation/devicetree/bindings/power/power_domain.txt | 6 ++++++
>> >  1 file changed, 6 insertions(+)
>> > 
>> > diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt
>> > index e1650364b296..db42eacf8b5c 100644
>> > --- a/Documentation/devicetree/bindings/power/power_domain.txt
>> > +++ b/Documentation/devicetree/bindings/power/power_domain.txt
>> > @@ -106,6 +106,12 @@ domain provided by the 'parent' power controller.
>> >   - power-domains : A phandle and PM domain specifier as defined by bindings of
>> >                     the power controller specified by phandle.
>> >  
>> > +Optional properties:
>> > +- domain-performance-state: A positive integer value representing the minimum
>> > +  performance level (of the parent domain) required by the consumer for its
>> > +  working. The integer value '1' represents the lowest performance level and the
>> > +  highest value represents the highest performance level.
>> 
>> How does one come up with the range of values?
>
> Why would we need a range here? The value here represents the minimum 'state'
> and the assumption is that everything above that level would be fine. So the
> range is automatically: domain-performance-state -> MAX.
>
>> It seems like you are 
>> just making up numbers. Couldn't the domain performance level be an OPP 
>> in the sense that it is a collection of clock frequencies and voltage 
>> settings?
>
> The clock is going to be handled by the device itself (at least for the case we
> have today) and the performance-state lies with the power-domain which is
> configured separately. If the performance level includes both clk and voltage,
> then why would we need to show the clock rates in the DT ? Wouldn't a
> performance level be enough in such cases?

I think the question is: what does the performance-level of a domain
actually mean?  Or, what are the units?

Depending on the SoC, there's probably a few things this could mean.  It
might mean is that an underlying bus/interconnect can be configured to
guarantee a specific bandwidth or throughput.  That in turn might mean
that that bus/interconnect might have to be set at a specific
frequency/voltage.

In your case, IIUC, you're just passing some magic value to some
firmware running on a micro-controller, but under the hood that uC is
probably configuring a frequency/voltage someplace.

So, if we're going to have a generic DT binding for this, it needs to be
something that's useful on platforms that are not using magic numbers
managed by a uC as well.

Kevin