linux-kernel - [PATCH 4.8 04/67] arm64: KVM: pmu: Fix AArch32 cycle counter access

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Date:   Thu, 24 Nov 2016 16:26:58 +0100
From:   Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To:     linux-kernel@...r.kernel.org
Cc:     Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        stable@...r.kernel.org, Wei Huang <wei@...hat.com>,
        Marc Zyngier <marc.zyngier@....com>
Subject: [PATCH 4.8 04/67] arm64: KVM: pmu: Fix AArch32 cycle counter access

4.8-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Wei Huang <wei@...hat.com>

commit 9e3f7a29694049edd728e2400ab57ad7553e5aa9 upstream.

We're missing the handling code for the cycle counter accessed
from a 32bit guest, leading to unexpected results.

Signed-off-by: Wei Huang <wei@...hat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@....com>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

---
 arch/arm64/kvm/sys_regs.c |   10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -602,8 +602,14 @@ static bool access_pmu_evcntr(struct kvm
 
 			idx = ARMV8_PMU_CYCLE_IDX;
 		} else {
-			BUG();
+			return false;
 		}
+	} else if (r->CRn == 0 && r->CRm == 9) {
+		/* PMCCNTR */
+		if (pmu_access_event_counter_el0_disabled(vcpu))
+			return false;
+
+		idx = ARMV8_PMU_CYCLE_IDX;
 	} else if (r->CRn == 14 && (r->CRm & 12) == 8) {
 		/* PMEVCNTRn_EL0 */
 		if (pmu_access_event_counter_el0_disabled(vcpu))
@@ -611,7 +617,7 @@ static bool access_pmu_evcntr(struct kvm
 
 		idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
 	} else {
-		BUG();
+		return false;
 	}
 
 	if (!pmu_counter_idx_valid(vcpu, idx))