lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Thu, 24 Nov 2016 17:01:46 +0100 From: Jerome Brunet <jbrunet@...libre.com> To: Martin Blumenstingl <martin.blumenstingl@...glemail.com> Cc: netdev@...r.kernel.org, devicetree@...r.kernel.org, Florian Fainelli <f.fainelli@...il.com>, Carlo Caione <carlo@...one.org>, Kevin Hilman <khilman@...libre.com>, Giuseppe Cavallaro <peppe.cavallaro@...com>, Alexandre TORGUE <alexandre.torgue@...com>, Andre Roth <neolynx@...il.com>, Neil Armstrong <narmstrong@...libre.com>, linux-amlogic@...ts.infradead.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: Re: [RFC PATCH net v2 0/3] Fix OdroidC2 Gigabit Tx link issue On Thu, 2016-11-24 at 15:40 +0100, Martin Blumenstingl wrote: > Hi Jerome, > > On Mon, Nov 21, 2016 at 4:35 PM, Jerome Brunet <jbrunet@...libre.com> > wrote: > > > > This patchset fixes an issue with the OdroidC2 board (DWMAC + > > RTL8211F). > > Initially reported as a low Tx throughput issue at gigabit speed, > > the > > platform enters LPI too often. This eventually break the link (both > > Tx > > and Rx), and require to bring the interface down and up again to > > get the > > Rx path working again. > > > > The root cause of this issue is not fully understood yet but > > disabling EEE > > advertisement on the PHY prevent this feature to be negotiated. > > With this change, the link is stable and reliable, with the > > expected > > throughput performance. > I have just sent a series which allows configuring the TX delay on > the > MAC (dwmac-meson8b glue) side: [0] > Disabling the TX delay generated by the MAC fixes TX throughput for > me, even when leaving EEE enabled in the RTL8211F PHY driver! > > Unfortunately the RTL8211F PHY is a black-box for the community > because there is no public datasheeet available. > *maybe* (pure speculation!) they're enabling the TX delay based on > some internal magic only when EEE is enabled. Hi already tried acting on the register setting the TX_delay. I also tried on the PHY. I never been able to improve situation on the Odroic2. Only disabling EEE improved the situation. To make sure, i tried again with your patch but the result remains unchanged. With Tx_delay disabled (either the mac or the phy), the situation is even worse, it seems that nothing gets through > > Jerome, could you please re-test the behavior on your Odroid-C2 when > you have EEE still enabled but the TX-delay disabled? > In my case throughput is fine, and "$ ethtool -S eth0 | grep lpi" > gives: > irq_tx_path_in_lpi_mode_n: 0 > irq_tx_path_exit_lpi_mode_n: 0 > irq_rx_path_in_lpi_mode_n: 0 > irq_rx_path_exit_lpi_mode_n: 0 > I still have lpi interrupts on my side. I don't get how a properly configured tx_delay would disable EEE. I must be missing something here. > > Regards, > Martin > > > [0] http://lists.infradead.org/pipermail/linux-amlogic/2016-November/ > 001674.html
Powered by blists - more mailing lists