linux-kernel - Re: [PATCH v10 09/13] drm/mediatek: add mipi

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Message-ID: <1480503911.13978.12.camel@mtksdaap41>
Date:   Wed, 30 Nov 2016 19:05:11 +0800
From:   CK Hu <ck.hu@...iatek.com>
To:     YT Shen <yt.shen@...iatek.com>
CC:     <dri-devel@...ts.freedesktop.org>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        David Airlie <airlied@...ux.ie>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Daniel Kurtz <djkurtz@...omium.org>,
        Mao Huang <littlecvr@...omium.org>,
        Bibby Hsieh <bibby.hsieh@...iatek.com>,
        "Daniel Vetter" <daniel.vetter@...ll.ch>,
        Thierry Reding <thierry.reding@...il.com>,
        Jie Qiu <jie.qiu@...iatek.com>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chris Wilson <chris@...is-wilson.co.uk>,
        shaoming chen <shaoming.chen@...iatek.com>,
        Jitao Shi <jitao.shi@...iatek.com>,
        Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Dan Carpenter <dan.carpenter@...cle.com>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <srv_heupstream@...iatek.com>,
        Sascha Hauer <kernel@...gutronix.de>,
        <yingjoe.chen@...iatek.com>, <emil.l.velikov@...il.com>
Subject: Re: [PATCH v10 09/13] drm/mediatek: add mipi_tx data rate check

Hi, YT:


On Fri, 2016-11-25 at 18:34 +0800, YT Shen wrote:
> modify data rate limitation (>lGbps/lane) for mipitx
> 

I think MT2701 DRM can work correctly without this patch.
Why do you put this patch in MT2701 series?
Maybe you can send this patch independently.

Regards,
CK

> Signed-off-by: shaoming chen <shaoming.chen@...iatek.com>
> Signed-off-by: YT Shen <yt.shen@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_mipi_tx.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_mipi_tx.c b/drivers/gpu/drm/mediatek/mtk_mipi_tx.c
> index fd84914..1ef00ac 100644
> --- a/drivers/gpu/drm/mediatek/mtk_mipi_tx.c
> +++ b/drivers/gpu/drm/mediatek/mtk_mipi_tx.c
> @@ -177,7 +177,9 @@ static int mtk_mipi_tx_pll_prepare(struct clk_hw *hw)
>  
>  	dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate);
>  
> -	if (mipi_tx->data_rate >= 500000000) {
> +	if (mipi_tx->data_rate > 1250000000) {
> +		return -EINVAL;
> +	} else if (mipi_tx->data_rate >= 500000000) {
>  		txdiv = 1;
>  		txdiv0 = 0;
>  		txdiv1 = 0;