linux-kernel - Re: Question about Perf's handling of in-use performance counters

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Message-ID: <BN3PR0501MB14597261479AD30C8081CBA2A38C0@BN3PR0501MB1459.namprd05.prod.outlook.com>
Date:   Wed, 30 Nov 2016 15:44:57 +0000
From:   Taylor Andrews <andrewst@...are.com>
To:     Andi Kleen <andi@...stfloor.org>,
        Peter Zijlstra <peterz@...radead.org>
CC:     "linux-perf-users@...r.kernel.org" <linux-perf-users@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Alok Kataria <akataria@...are.com>
Subject: Re: Question about Perf's handling of in-use performance counters

Hi,

Friendly ping as this discussion seems to have stalled.

For the full discussion please see http://www.spinics.net/lists/linux-perf-users/msg03168.html

Thanks,
Taylor

________________________________________
From: Taylor Andrews
Sent: Friday, October 28, 2016 2:28 PM
To: Andi Kleen; Peter Zijlstra
Cc: linux-perf-users@...r.kernel.org
Subject: Re: Question about Perf's handling of in-use performance counters

Hi Andi, Peter,

Thanks so much for the responses.

Hi Peter,

> No, it was about the (mis)guide-line having fundamental races and the
> belief that the BIOS has no business what so ever using these resources
> to begin with.

Can you please describe what fundamental races you are talking about?

Why do you believe the BIOS should never be using performance counters?

Even if you discount the BIOS use case (despite Intel considering it legitimate), we still have the scenario of a Hypervisor exposing some virtual performance counters as in-use and unavailable.  What was the rationale that the PMU cooperative sharing guidelines outlined by Intel should be intentionally ignored, and that perf should attempt to take over all generic performance counters, regardless of if they are marked in-use?

It should be noted that this design decision degrades the experience of using perf in x86 VMware VMs and has confused perf users.  If one or more virtual generic counters are not available, attempted writes to them are dropped by the Hypervisor so as not to corrupt other entities that are using the real PMU hardware.  This attempted use of in-use counters results in reported event counts of zero from perf with no errors or warnings that could better inform the user of the real issue - that there is a lack of available PMU resources to complete the requested profiling.

Thanks,
Taylor

________________________________________
From: Andi Kleen <andi@...stfloor.org>
Sent: Friday, October 28, 2016 12:33 PM
To: Peter Zijlstra
Cc: Andi Kleen; Taylor Andrews; linux-perf-users@...r.kernel.org
Subject: Re: Question about Perf's handling of in-use performance counters

> But the thing is still racy, and therefore useless.

At least the Hypervisor case is not racy. The Hypervisor always
uses that counter.

-Andi