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Message-ID: <20161206073257.GB18470@yury-N73SV>
Date:   Tue, 6 Dec 2016 13:02:57 +0530
From:   Yury Norov <ynorov@...iumnetworks.com>
To:     Catalin Marinas <catalin.marinas@....com>
CC:     <arnd@...db.de>, <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-doc@...r.kernel.org>,
        <linux-arch@...r.kernel.org>, <szabolcs.nagy@....com>,
        <heiko.carstens@...ibm.com>, <cmetcalf@...hip.com>,
        <philipp.tomsich@...obroma-systems.com>, <joseph@...esourcery.com>,
        <zhouchengming1@...wei.com>, <Prasun.Kapoor@...iumnetworks.com>,
        <agraf@...e.de>, <geert@...ux-m68k.org>, <kilobyte@...band.pl>,
        <manuel.montezelo@...il.com>, <pinskia@...il.com>,
        <linyongting@...wei.com>, <klimov.linux@...il.com>,
        <broonie@...nel.org>, <bamvor.zhangjian@...wei.com>,
        <maxim.kuvyrkov@...aro.org>, <Nathan_Lynch@...tor.com>,
        <schwidefsky@...ibm.com>, <davem@...emloft.net>,
        <christoph.muellner@...obroma-systems.com>
Subject: Re: [PATCH 11/18] arm64: ilp32: share aarch32 syscall handlers

On Mon, Dec 05, 2016 at 05:12:43PM +0000, Catalin Marinas wrote:
> On Fri, Oct 21, 2016 at 11:33:10PM +0300, Yury Norov wrote:
> > off_t is  passed in register pair just like in aarch32.
> > In this patch corresponding aarch32 handlers are shared to
> > ilp32 code.
> [...]
> > +/*
> > + * Note: off_4k (w5) is always in units of 4K. If we can't do the
> > + * requested offset because it is not page-aligned, we return -EINVAL.
> > + */
> > +ENTRY(compat_sys_mmap2_wrapper)
> > +#if PAGE_SHIFT > 12
> > +	tst	w5, #~PAGE_MASK >> 12
> > +	b.ne	1f
> > +	lsr	w5, w5, #PAGE_SHIFT - 12
> > +#endif
> > +	b	sys_mmap_pgoff
> > +1:	mov	x0, #-EINVAL
> > +	ret
> > +ENDPROC(compat_sys_mmap2_wrapper)
> 
> For compat sys_mmap2, the pgoff argument is in multiples of 4K. This was
> traditionally used for architectures where off_t is 32-bit to allow
> mapping files to 2^44.
> 
> Since off_t is 64-bit with AArch64/ILP32, should we just pass the off_t
> as a 64-bit value in two different registers (w5 and w6)?

Current glibc implementation becomes broken for 64-bit off_t if
if I'll do what you want.
sysdeps/unix/sysv/linux/generic/wordsize-32/mmap.c
28 __ptr_t
29 __mmap (__ptr_t addr, size_t len, int prot, int flags, int fd, off_t offset)
30 {
31   if (offset & (MMAP_PAGE_UNIT - 1))
32     {
33       __set_errno (EINVAL);
34       return MAP_FAILED;
35     }
36   return (__ptr_t) INLINE_SYSCALL (mmap2, 6, addr, len, prot, flags, fd,
37                                    offset / MMAP_PAGE_UNIT);
38 }
39 
40 weak_alias (__mmap, mmap)

So it requires changes both in glibc and in kernel. I can do it. But
I'd like to collect opinions of kernel and glibc developers before
starting it. 

Yury

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