[<prev] [next>] [day] [month] [year] [list]
Message-ID: <CALCETrXf6EH=93+tORGaH=bfvgRDyoZopvjy=um9VYo-g5guAA@mail.gmail.com>
Date: Tue, 6 Dec 2016 09:46:39 -0800
From: Andy Lutomirski <luto@...capital.net>
To: Jan Beulich <JBeulich@...e.com>
Cc: Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>,
Andrew Cooper <andrew.cooper3@...rix.com>,
Brian Gerst <brgerst@...il.com>,
Matthew Whitehead <tedheadster@...il.com>,
Henrique de Moraes Holschuh <hmh@....eng.br>,
Andy Lutomirski <luto@...nel.org>, X86 ML <x86@...nel.org>,
xen-devel <Xen-devel@...ts.xen.org>,
One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Juergen Gross <JGross@...e.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [Xen-devel] [PATCH v3 4/4] x86/asm: Rewrite sync_core() to use IRET-to-self
On Tue, Dec 6, 2016 at 1:49 AM, Jan Beulich <JBeulich@...e.com> wrote:
>>>> On 06.12.16 at 10:25, <peterz@...radead.org> wrote:
>> On Tue, Dec 06, 2016 at 01:46:37AM -0700, Jan Beulich wrote:
>>> > + asm volatile (
>>> > + "pushfl\n\t"
>>> > + "pushl %%cs\n\t"
>>> > + "pushl $1f\n\t"
>>> > + "iret\n\t"
>>> > + "1:"
>>> > + : "+r" (__sp) : : "cc", "memory");
>>>
>>> I don't thing EFLAGS (i.e. "cc") gets modified anywhere here. And
>>> the memory clobber would perhaps better be pulled out into an
>>> explicit barrier() invocation (making it more obvious what it's needed
>>> for)?
>>
>> EVerything that implies a memory barrier (and I think serializing
>> instructions do that) also imply a compiler barrier.
>>
>> Not doing the memory clobber gets you inconsistency wrt everything else.
>
> Well, I didn't say dropping the memory clobber altogether, but
> split it into a separate barrier() invocation (placed perhaps after
> the #endif).
I'll add a comment. I'm fixing up the constraints, too. (Although if
gcc allocated tmp into rsp, that would be very strange indeed.)
--Andy
Powered by blists - more mailing lists