linux-kernel - [PATCH v2 02/10] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date:   Wed,  7 Dec 2016 11:55:19 -0500
From:   Anurup M <anurupvasu@...il.com>
To:     robh+dt@...nel.org, mark.rutland@....com, will.deacon@....com
Cc:     linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, anurup.m@...wei.com,
        zhangshaokun@...ilicon.com, tanxiaojun@...wei.com,
        xuwei5@...ilicon.com, sanil.kumar@...ilicon.com,
        john.garry@...wei.com, gabriele.paoloni@...wei.com,
        shiju.jose@...wei.com, wangkefeng.wang@...wei.com,
        linuxarm@...wei.com, shyju.pv@...wei.com, anurupvasu@...il.com
Subject: [PATCH v2 02/10] dt-bindings: hisi: Add Hisilicon HiP05/06/07 Djtag dts bindings

From: Tan Xiaojun <tanxiaojun@...wei.com>

Add Hisilicon HiP05/06/07 Djtag dts bindings for CPU and IO Die

Signed-off-by: Tan Xiaojun <tanxiaojun@...wei.com>
Signed-off-by: Anurup M <anurup.m@...wei.com>
---
 .../devicetree/bindings/arm/hisilicon/djtag.txt    | 41 ++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/hisilicon/djtag.txt

diff --git a/Documentation/devicetree/bindings/arm/hisilicon/djtag.txt b/Documentation/devicetree/bindings/arm/hisilicon/djtag.txt
new file mode 100644
index 0000000..733498e
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/hisilicon/djtag.txt
@@ -0,0 +1,41 @@
+The Hisilicon Djtag is an independent component which connects with some other
+components in the SoC by Debug Bus. The djtag is available in CPU and IO dies
+in the chip. The djtag controls access to connecting modules of CPU and IO
+dies.
+The various connecting components in CPU die (like L3 cache, L3 cache PMU etc.)
+are accessed by djtag during real time debugging. In IO die there are connecting
+components like RSA. These components appear as devices atatched to djtag bus.
+
+Hisilicon HiP05/06 djtag for CPU and HiP05 IO die
+Required properties:
+  - compatible : "hisilicon,hisi-djtag-v1"
+  - reg : Register address and size
+  - scl-id : The Super Cluster ID for CPU or IO die
+
+Hisilicon HiP06 djtag for IO die and HiP07 djtag for CPU and IO die
+Required properties:
+  - compatible : "hisilicon,hisi-djtag-v2"
+  - reg : Register address and size
+  - scl-id : The Super Cluster ID for CPU or IO die
+
+Example 1: Djtag for CPU die
+
+	/* for Hisilicon HiP05 djtag for CPU Die */
+	djtag0: djtag@...10000 {
+		compatible = "hisilicon,hisi-djtag-v1";
+		reg = <0x0 0x80010000 0x0 0x10000>;
+		scl-id = <0x02>;
+
+		/* All connecting components will appear as child nodes */
+	};
+
+Example 2: Djtag for IO die
+
+	/* for Hisilicon HiP05 djtag for IO Die */
+	djtag1: djtag@...00000 {
+		compatible = "hisilicon,hisi-djtag-v1";
+		reg = <0x0 0xd0000000 0x0 0x10000>;
+		scl-id = <0x01>;
+
+		/* All connecting components will appear as child nodes */
+	};
-- 
2.1.4