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Message-ID: <yw1x7f7az8c3.fsf@unicorn.mansr.com>
Date: Thu, 08 Dec 2016 16:36:28 +0000
From: Måns Rullgård <mans@...sr.com>
To: Vinod Koul <vinod.koul@...el.com>
Cc: Geert Uytterhoeven <geert@...ux-m68k.org>,
Mason <slash.tmp@...e.fr>, Russell King <linux@....linux.org.uk>,
dmaengine@...r.kernel.org,
Linus Walleij <linus.walleij@...aro.org>,
Dan Williams <dan.j.williams@...el.com>,
LKML <linux-kernel@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Jon Mason <jdmason@...zu.us>, Mark Brown <broonie@...nel.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Lee Jones <lee.jones@...aro.org>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Arnd Bergmann <arnd@...db.de>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Dave Jiang <dave.jiang@...el.com>,
Peter Ujfalusi <peter.ujfalusi@...com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Sebastian Frias <sf84@...oste.net>,
Thibaud Cornic <thibaud_cornic@...madesigns.com>
Subject: Re: Tearing down DMA transfer setup after DMA client has finished
Vinod Koul <vinod.koul@...el.com> writes:
> On Thu, Dec 08, 2016 at 12:20:30PM +0000, Måns Rullgård wrote:
>> >
>> > I'm far from claiming that drivers/tty/serial/sh-sci.c is perfect, but
>> > it does request DMA channels at open time, not at probe time.
>>
>> In the part quoted above, I said most drivers request dma channels in
>> their probe or open functions. For the purposes of this discussion,
>> that distinction is irrelevant. In either case, the channel is held
>> indefinitely.
>
> And the answer was it is wrong and not _all_ do that!!
Show me one that doesn't.
>> If this wasn't the correct way to use the dmaengine,
>> there would be no need for the virt-dma helpers which are specifically
>> designed for cases the one currently at hand.
>
> That is incorrect.
>
> virt-dma helps to have multiple request from various clients. For many
> controllers which implement a SW mux, they can transfer data for one client
> and then next transfer can be for some other one.
>
> This allows better utilization of dma channels and helps in case where we
> have fewer dma channels than users.
Which is *exactly* the situation we have here.
I have no idea what you're arguing for or against any more. Perhaps
you're just arguing.
>> The only problem we have is that nobody envisioned hardware where the
>> dma engine indicates completion slightly too soon. I suspect there's a
>> fifo or such somewhere, and the interrupt is triggered when the last
>> byte has been placed in the fifo rather than when it has been removed
>> which would have been more correct.
>
> That is pretty common hardware optimization but usually hardware shows up
> with flush commands to let in flight transactions be completed.
Well, this hardware seems to lack that particular feature. Pretending
otherwise isn't helping.
--
Måns Rullgård
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