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Date:   Tue, 13 Dec 2016 00:08:41 +0530
From:   Sricharan R <sricharan@...eaurora.org>
To:     jcrouse@...eaurora.org, pdaly@...eaurora.org,
        jgebben@...eaurora.org, joro@...tes.org,
        linux-kernel@...r.kernel.org, pratikp@...eaurora.org,
        iommu@...ts.linux-foundation.org, robin.murphy@....com,
        tzeng@...eaurora.org, linux-arm-kernel@...ts.infradead.org,
        will.deacon@....com, mitchelh@...eaurora.org, vinod.koul@...el.com
Cc:     sricharan@...eaurora.org, dan.j.williams@...el.com
Subject: [PATCH V7 2/8] iommu/io-pgtable-arm: add support for the IOMMU_PRIV flag

From: Jeremy Gebben <jgebben@...eaurora.org>

Allow the creation of privileged mode mappings, for stage 1 only.

Reviewed-by: Robin Murphy <robin.murphy@....com>
Tested-by: Robin Murphy <robin.murphy@....com>
Acked-by: Will Deacon <will.deacon@....com>
Signed-off-by: Jeremy Gebben <jgebben@...eaurora.org>
---
 drivers/iommu/io-pgtable-arm.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index f5c90e1..69ba83a 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -350,11 +350,14 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct arm_lpae_io_pgtable *data,
 
 	if (data->iop.fmt == ARM_64_LPAE_S1 ||
 	    data->iop.fmt == ARM_32_LPAE_S1) {
-		pte = ARM_LPAE_PTE_AP_UNPRIV | ARM_LPAE_PTE_nG;
+		pte = ARM_LPAE_PTE_nG;
 
 		if (!(prot & IOMMU_WRITE) && (prot & IOMMU_READ))
 			pte |= ARM_LPAE_PTE_AP_RDONLY;
 
+		if (!(prot & IOMMU_PRIV))
+			pte |= ARM_LPAE_PTE_AP_UNPRIV;
+
 		if (prot & IOMMU_MMIO)
 			pte |= (ARM_LPAE_MAIR_ATTR_IDX_DEV
 				<< ARM_LPAE_PTE_ATTRINDX_SHIFT);
-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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