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Message-ID: <b1e99e42-be9f-12ca-d687-b08306ed56fd@cogentembedded.com>
Date:   Tue, 13 Dec 2016 10:51:52 +0300
From:   Nikita Yushchenko <nikita.yoush@...entembedded.com>
To:     Stephen Boyd <sboyd@...eaurora.org>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        Fabio Estevam <fabio.estevam@....com>,
        Michael Turquette <mturquette@...libre.com>,
        linux-clk@...r.kernel.org, Chris Healy <cphealy@...il.com>,
        linux-kernel@...r.kernel.org,
        Andrey Smirnov <andrew.smirnov@...il.com>
Subject: Re: [PATCH] clk: imx: pllv3: support fractional multiplier on vf610
 PLL1/PLL2

>> diff --git a/drivers/clk/imx/clk-pllv3.c b/drivers/clk/imx/clk-pllv3.c
>> index 19f9b622981a..24a9e914e0d5 100644
>> --- a/drivers/clk/imx/clk-pllv3.c
>> +++ b/drivers/clk/imx/clk-pllv3.c
>> @@ -288,6 +291,87 @@ static const struct clk_ops clk_pllv3_av_ops = {
>>  	.set_rate	= clk_pllv3_av_set_rate,
>>  };
>>  
>> +static unsigned long clk_pllv3_vf610_recalc_rate(struct clk_hw *hw,
>> +					      unsigned long parent_rate)
>> +{
>> +	struct clk_pllv3 *pll = to_clk_pllv3(hw);
>> +	u32 mfn = readl_relaxed(pll->base + PLL_VF610_NUM_OFFSET);
>> +	u32 mfd = readl_relaxed(pll->base + PLL_VF610_DENOM_OFFSET);
>> +	u32 div = (readl_relaxed(pll->base) & pll->div_mask) ? 22 : 20;

Should be not 'div' but 'mfi' to be consistent with datasheet and with
other routines in the same patch. Will fix.

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