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Message-Id: <1481618869-1239-1-git-send-email-zhangqing@rock-chips.com>
Date:   Tue, 13 Dec 2016 16:47:46 +0800
From:   Elaine Zhang <zhangqing@...k-chips.com>
To:     heiko@...ech.de, mturquette@...libre.com, sboyd@...eaurora.org,
        xf@...k-chips.com
Cc:     robh+dt@...nel.org, mark.rutland@....com,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, huangtao@...k-chips.com,
        xxx@...k-chips.com, cl@...k-chips.com,
        linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
        Elaine Zhang <zhangqing@...k-chips.com>
Subject: [PATCH v1 0/3] clk: rockchip: support clk controller for rk3328 SoC

Elaine Zhang (3):
  clk: rockchip: add dt-binding header for rk3328
  clk: rockchip: add clock controller for rk3328
  clk: rockchip: add new pll-type for rk3328 and similar socs

 drivers/clk/rockchip/Makefile          |    1 +
 drivers/clk/rockchip/clk-pll.c         |   13 +-
 drivers/clk/rockchip/clk-rk3328.c      | 1068 ++++++++++++++++++++++++++++++++
 drivers/clk/rockchip/clk.h             |   23 +
 include/dt-bindings/clock/rk3328-cru.h |  403 ++++++++++++
 5 files changed, 1507 insertions(+), 1 deletion(-)
 create mode 100644 drivers/clk/rockchip/clk-rk3328.c
 create mode 100644 include/dt-bindings/clock/rk3328-cru.h

-- 
1.9.1


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