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Message-Id: <20161213131115.764824574@linutronix.de>
Date: Tue, 13 Dec 2016 13:14:17 -0000
From: Thomas Gleixner <tglx@...utronix.de>
To: LKML <linux-kernel@...r.kernel.org>
Cc: x86@...nel.org, Peter Zijlstra <peterz@...radead.org>,
Borislav Petkov <bp@...en8.de>,
Bruce Schlobohm <bruce.schlobohm@...el.com>,
Roland Scheidegger <rscheidegger_lists@...peed.ch>,
Kevin Stanton <kevin.b.stanton@...el.com>,
Allen Hung <allen_hung@...l.com>
Subject: [patch 0/2] tsc/adjust: Cure suspend/resume issues and prevent TSC
deadline timer irq storm
Roland reported interesting TSC ADJUST register wreckage on his DELL
machine, which seems to populate that MSR with a random number generator.
Deeper investagation into fixing this wreckage unearthed another special
feature which is designed by Intel: Negative TSC adjuste values cause
interrupt storms on the TSC deadline timer. Further details in patch 2/2
Thanks
tglx
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