linux-kernel - Re: [PATCH 1/6] clk: sunxi-ng: fix PLL

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Message-ID: <20161213154426.gnuohez6seeu7kso@lukather>
Date:   Tue, 13 Dec 2016 16:44:26 +0100
From:   Maxime Ripard <maxime.ripard@...e-electrons.com>
To:     Icenowy Zheng <icenowy@...c.xyz>
Cc:     Russell King <linux@...linux.org.uk>, Chen-Yu Tsai <wens@...e.org>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...eaurora.org>,
        Jorik Jonker <jorik@...pendief.biz>,
        Hans de Goede <hdegoede@...hat.com>,
        Quentin Schulz <quentin.schulz@...e-electrons.com>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org
Subject: Re: [PATCH 1/6] clk: sunxi-ng: fix PLL_CPUX adjusting on A33

On Tue, Dec 13, 2016 at 11:22:47PM +0800, Icenowy Zheng wrote:
> When adjusting PLL_CPUX on A33, the PLL is temporarily driven too high,
> and the system hangs.
> 
> Add a notifier to avoid this situation by temporarily switching to a
> known stable 24 MHz oscillator.
> 
> Signed-off-by: Icenowy Zheng <icenowy@...c.xyz>

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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