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Message-Id: <20161214063545.GA26271@in.ibm.com>
Date: Wed, 14 Dec 2016 12:05:45 +0530
From: Gautham R Shenoy <ego@...ux.vnet.ibm.com>
To: Balbir Singh <bsingharora@...il.com>
Cc: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>,
Michael Ellerman <mpe@...erman.id.au>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
"Rafael J. Wysocki" <rjw@...ysocki.net>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Michael Neuling <mikey@...ling.org>,
Vaidyanathan Srinivasan <svaidy@...ux.vnet.ibm.com>,
"Shreyas B. Prabhu" <shreyasbp@...il.com>,
Shilpasri G Bhat <shilpa.bhat@...ux.vnet.ibm.com>,
Stewart Smith <stewart@...ux.vnet.ibm.com>,
"Oliver O'Halloran" <oohall@...il.com>,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
linux-pm@...r.kernel.org, devicetree@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v4 1/4] powernv:idle: Add IDLE_STATE_ENTER_SEQ_NORET macro
Hi Balbir,
On Tue, Dec 13, 2016 at 09:13:26PM +1100, Balbir Singh wrote:
>
>
> On 10/12/16 00:32, Gautham R. Shenoy wrote:
> > From: "Gautham R. Shenoy" <ego@...ux.vnet.ibm.com>
> > diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/asm/cpuidle.h
> > index 3919332..0a3255b 100644
> > --- a/arch/powerpc/include/asm/cpuidle.h
> > +++ b/arch/powerpc/include/asm/cpuidle.h
> > @@ -21,7 +21,7 @@
> >
> > /* Idle state entry routines */
> > #ifdef CONFIG_PPC_P7_NAP
> > -#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
> > +#define IDLE_STATE_ENTER_SEQ(IDLE_INST) \
> > /* Magic NAP/SLEEP/WINKLE mode enter sequence */ \
> > std r0,0(r1); \
> > ptesync; \
> > @@ -29,6 +29,9 @@
> > 1: cmpd cr0,r0,r0; \
> > bne 1b; \
> > IDLE_INST; \
> > +
>
> Is the power saving magic sequence the same as before for power 9
> as well?
Yes, this is the same magic sequence for POWER9.
--
Thanks and Regards
gautham.
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