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Message-Id: <1481710301-1454-1-git-send-email-zhengxing@rock-chips.com>
Date: Wed, 14 Dec 2016 18:11:38 +0800
From: Xing Zheng <zhengxing@...k-chips.com>
To: linux-rockchip@...ts.infradead.org
Cc: dianders@...gle.com, heiko@...ech.de,
Xing Zheng <zhengxing@...k-chips.com>,
William wu <wulf@...k-chips.com>,
Rob Herring <robh+dt@...nel.org>,
Shawn Lin <shawn.lin@...k-chips.com>,
Catalin Marinas <catalin.marinas@....com>,
Elaine Zhang <zhangqing@...k-chips.com>,
linux-clk@...r.kernel.org, David Wu <david.wu@...k-chips.com>,
Brian Norris <briannorris@...omium.org>,
Lin Huang <hl@...k-chips.com>,
Douglas Anderson <dianders@...omium.org>,
Will Deacon <will.deacon@....com>, devicetree@...r.kernel.org,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...eaurora.org>,
linux-arm-kernel@...ts.infradead.org,
Jianqun Xu <jay.xu@...k-chips.com>,
linux-kernel@...r.kernel.org, Caesar Wang <wxt@...k-chips.com>,
Chris Zhong <zyw@...k-chips.com>,
Mark Rutland <mark.rutland@....com>
Subject: [PATCH 0/3] Add and export clk-480m clocks for ehci and ohci on RK3399
Hi,
This patches would like to fix the USB suspend block without
the clk-480m clock. Let's add and export them to control them.
Thanks.
William wu (1):
arm64: dts: rockchip: add clk-480m for ehci and ohci of rk3399
Xing Zheng (2):
clk: rockchip: rk3399: add USBPHYx_480M_SRC clock IDs
clk: rockchip: rk3399: export 480M_SRC clocks id for usbphy0/usbphy1
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 28 ++++++++++++++++++++--------
drivers/clk/rockchip/clk-rk3399.c | 4 ++--
include/dt-bindings/clock/rk3399-cru.h | 2 ++
3 files changed, 24 insertions(+), 10 deletions(-)
--
2.7.4
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