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Message-Id: <1481795755-15302-6-git-send-email-absahu@codeaurora.org>
Date: Thu, 15 Dec 2016 15:25:55 +0530
From: Abhishek Sahu <absahu@...eaurora.org>
To: vinod.koul@...el.com, dan.j.williams@...el.com,
andy.gross@...aro.org
Cc: stanimir.varbanov@...aro.org, mcgrof@...e.com,
okaya@...eaurora.org, pramod.gurav@...aro.org, arnd@...db.de,
linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org,
linux-arm-msm@...r.kernel.org,
Abhishek Sahu <absahu@...eaurora.org>
Subject: [PATCH 5/5] dmaengine: qca: bam_dma: implement command descriptor
QCA BAM also support command descriptor which allows the SW to
create descriptors of type command which does not generate any
data transmissions but configures registers in the peripheral.
In command descriptor the 32bit address point to the start of
the command block which holds the command elements and the
16bit size define the size of the command block.
Each Command Element is structured by 4 words:
Write command: address + cmd
register data
register mask
reserved
Read command: address + cmd
read data result address,
reserved
reserved
Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>
---
include/linux/dma/qcom_bam_dma.h | 46 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/include/linux/dma/qcom_bam_dma.h b/include/linux/dma/qcom_bam_dma.h
index 46344cf..7e317d7 100644
--- a/include/linux/dma/qcom_bam_dma.h
+++ b/include/linux/dma/qcom_bam_dma.h
@@ -23,6 +23,7 @@
#define DESC_FLAG_EOT BIT(14)
#define DESC_FLAG_EOB BIT(13)
#define DESC_FLAG_NWD BIT(12)
+#define DESC_FLAG_CMD BIT(11)
/*
* QCOM BAM DMA SGL struct
@@ -49,6 +50,34 @@ struct qcom_bam_custom_data {
};
/*
+ * This data type corresponds to the native Command Element
+ * supported by BAM DMA Engine.
+ *
+ * @addr - register address.
+ * @command - command type.
+ * @data - for write command: content to be written into peripheral register.
+ * for read command: dest addr to write peripheral register value to.
+ * @mask - register mask.
+ * @reserved - for future usage.
+ *
+ */
+struct bam_cmd_element {
+ __le32 addr:24;
+ __le32 command:8;
+ __le32 data;
+ __le32 mask;
+ __le32 reserved;
+};
+
+/*
+ * This enum indicates the command type in a command element
+ */
+enum bam_command_type {
+ BAM_WRITE_COMMAND = 0,
+ BAM_READ_COMMAND,
+};
+
+/*
* qcom_bam_sg_init_table - Init QCOM BAM SGL
* @bam_sgl: bam sgl
* @nents: number of entries in bam sgl
@@ -113,4 +142,21 @@ static inline int qcom_bam_map_sg(struct device *dev,
return ret;
}
+
+/*
+ * qcom_prep_bam_ce - Wrapper function to prepare a single BAM command element
+ * with the data that is passed to this function.
+ * @bam_ce: bam command element
+ * @addr: target address
+ * @command: command in bam_command_type
+ * @data: actual data for write and dest addr for read
+ */
+static inline void qcom_prep_bam_ce(struct bam_cmd_element *bam_ce,
+ uint32_t addr, uint32_t command, uint32_t data)
+{
+ bam_ce->addr = cpu_to_le32(addr);
+ bam_ce->command = cpu_to_le32(command);
+ bam_ce->data = cpu_to_le32(data);
+ bam_ce->mask = 0xFFFFFFFF;
+}
#endif
--
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