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Message-ID: <20161215111727.35csnouwegedcmuu@sirena.org.uk>
Date: Thu, 15 Dec 2016 11:17:27 +0000
From: Mark Brown <broonie@...nel.org>
To: Mason <slash.tmp@...e.fr>
Cc: Vinod Koul <vinod.koul@...el.com>,
Sebastian Frias <sf84@...oste.net>,
Russell King <linux@....linux.org.uk>,
dmaengine@...r.kernel.org,
Linus Walleij <linus.walleij@...aro.org>,
Dan Williams <dan.j.williams@...el.com>,
LKML <linux-kernel@...r.kernel.org>,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
Jon Mason <jdmason@...zu.us>,
Lars-Peter Clausen <lars@...afoo.de>,
Lee Jones <lee.jones@...aro.org>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Arnd Bergmann <arnd@...db.de>,
Maxime Ripard <maxime.ripard@...e-electrons.com>,
Dave Jiang <dave.jiang@...el.com>,
Peter Ujfalusi <peter.ujfalusi@...com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Thibaud Cornic <thibaud_cornic@...madesigns.com>
Subject: Re: Tearing down DMA transfer setup after DMA client has finished
On Fri, Dec 09, 2016 at 07:23:17PM +0100, Mason wrote:
> On 09/12/2016 18:56, Vinod Koul wrote:
> > Right, but in that case the fallback would be PIO mode, and if that is
> > not availble (IIRC some f your devices don't) then reject the usage with
> > EAGAIN.
> Maybe I'm missing something, but I don't see how that would help.
> Take the NAND Flash controller driver, for instance. PIO is not
> an option, because the ECC engine is tied to DMA.
> And failing with -EAGAIN doesn't help the busy looping situation.
> The caller should be put on some kind of queue to wait for a
> "channel ready" event.
Even without the tie into ECC being an issue it seems like falling back
to PIO could produce poor results at the system level - it's likely that
the PIO would be very expensive and take longer than waiting would've
done, increasing the burden on the CPU and slowing things down overall
for userspace.
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