lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <1482241726-27310-1-git-send-email-grzegorz.andrejczuk@intel.com>
Date:   Tue, 20 Dec 2016 14:48:41 +0100
From:   Grzegorz Andrejczuk <grzegorz.andrejczuk@...el.com>
To:     tglx@...utronix.de, mingo@...hat.com, hpa@...or.com, x86@...nel.org
Cc:     linux-kernel@...r.kernel.org, Piotr.Luc@...el.com,
        dave.hansen@...ux.intel.com,
        Grzegorz Andrejczuk <grzegorz.andrejczuk@...el.com>
Subject: [PATCH v11 0/5] Enabling Ring 3 MONITOR/MWAIT feature for Knights Landing

Following patches enable the use of the feature that allows
the Intel Xeon Phi x200 devices to use MONITOR/MWAIT instructions
outside ring 0. It allows userspace applications to use
more efficient synchronization operations, which improves performance
and energy efficiency.

v11:
Removed warning from 32-bit build
Removed "This patch" from commit messages

v10:
Included Piotr's patch for Knights Mill
Included Dave's comments from internal review
Rewritten commit messages
Remove x86_64 requirement
Fixed kernel boot parameter description
Used set_bit to update HWCAP2 bit
Rebased to kernel 4.9

v9:
Removed PHI from defines

v8:
Fixed commit messages
Removed logging
Used msr_set/clear_bit functions instesd of wrmsrl
Fixed documentation
Renamed HWCAP2_PHIR3MWAIT to HWCAP2_RING3MWAIT

v7:
Change order of the patches, with this code looks cleaner.
Changed the name of MSR to MSR_MISC_FEATURE_ENABLES.
Used Word 3 25th bit to expose feature.

v6: 

v5:
When phir3mwait=disable is cmdline switch off r3 mwait feature
Fix typos

v4:
Wrapped the enabling code by CONFIG_X86_64
Add documentation for phir3mwait=disable cmdline switch
Move probe_ function call from early_intel_init to intel_init
Fixed commit messages

v3:
Included Daves and Thomas comments

v2:
Check MSR before wrmsrl
Shortened names
Used Word 3 for feature init_scattered_cpuid_features()
Fixed commit messages

Grzegorz Andrejczuk (4):
  x86/msr: add MSR_MISC_FEATURE_ENABLES and RING3MWAIT bit
  x86/elf: add HWCAP2 to expose ring 3 MONITOR/MWAIT
  x86/cpufeature: add RING3MWAIT to CPU features
  x86/cpufeature: enable RING3MWAIT for Knights Landing

Piotr Luc (1):
  x86/cpufeature: enable RING3MWAIT for Knights Mill

 Documentation/kernel-parameters.txt |  3 +++
 arch/x86/include/asm/cpufeatures.h  |  2 +-
 arch/x86/include/asm/elf.h          |  9 +++++++++
 arch/x86/include/asm/msr-index.h    |  6 ++++++
 arch/x86/include/uapi/asm/hwcap2.h  |  7 +++++++
 arch/x86/kernel/cpu/common.c        |  3 +++
 arch/x86/kernel/cpu/intel.c         | 36 ++++++++++++++++++++++++++++++++++++
 7 files changed, 65 insertions(+), 1 deletion(-)
 create mode 100644 arch/x86/include/uapi/asm/hwcap2.h

-- 
2.5.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ