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Message-ID: <20161221230812.GL5423@codeaurora.org>
Date:   Wed, 21 Dec 2016 15:08:12 -0800
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     Nikita Yushchenko <nikita.yoush@...entembedded.com>
Cc:     Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <kernel@...gutronix.de>,
        Fabio Estevam <fabio.estevam@....com>,
        Michael Turquette <mturquette@...libre.com>,
        linux-clk@...r.kernel.org, Chris Healy <cphealy@...il.com>,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] clk: imx: pllv3: support fractional multiplier on
 vf610 PLL1/PLL2

On 12/19, Nikita Yushchenko wrote:
> On vf610, PLL1 and PLL2 have registers to configure fractional part of
> frequency multiplier.
> 
> This patch adds support for these registers.
> 
> This fixes "fast system clock" issue on boards where bootloader sets
> fractional multiplier for PLL1.
> 
> Suggested-by: Andrey Smirnov <andrew.smirnov@...il.com>
> CC: Chris Healy <cphealy@...il.com>
> Signed-off-by: Nikita Yushchenko <nikita.yoush@...entembedded.com>
> Tested-by: Andrey Smirnov <andrew.smirnov@...il.com>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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