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Message-ID: <20161227161134.ds67t5byucphwkjg@kozik-lap>
Date: Tue, 27 Dec 2016 18:11:34 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jaehoon Chung <jh80.chung@...sung.com>
Cc: linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
bhelgaas@...gle.com, robh+dt@...nel.org, mark.rutland@....com,
kgene@...nel.org, krzk@...nel.org, javier@....samsung.com,
kishon@...com, will.deacon@....com, catalin.marinas@....com,
cpgs@...sung.com
Subject: Re: [RFC PATCH 3/6] ARM64: dts: exynos5433: add the pcie_phy node
for PCIe
On Mon, Dec 26, 2016 at 02:20:26PM +0900, Jaehoon Chung wrote:
> To use the generic PHY framework, adds the pcie_phy node.
>
> Signed-off-by: Jaehoon Chung <jh80.chung@...sung.com>
> ---
> arch/arm64/boot/dts/exynos/exynos5433.dtsi | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> index 64226d5..2a15f18 100644
> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
> @@ -805,6 +805,11 @@
> reg = <0x145f0000 0x1038>;
> };
>
> + syscon_fsys: syscon@...f0000 {
> + compatible = "syscon";
> + reg = <0x156f0000 0x1044>;
> + };
> +
> gsc_0: video-scaler@...00000 {
> compatible = "samsung,exynos5433-gsc";
> reg = <0x13c00000 0x1000>;
> @@ -1443,6 +1448,15 @@
> status = "disabled";
> };
> };
> +
> + pcie_phy: pcie-phy@...80000 {
> + #phy-cells = <0>;
> + compatible = "samsung,exynos5433-pcie-phy";
Mostly we use the convention of compatible being first property.
> + reg = <0x15680000 0x1000>;
> + samsung,pmureg-phandle = <&pmu_system_controller>;
> + samsung,fsys-sysreg = <&syscon_fsys>;
> + status = "okay";
Why do you need to put status=okay here?
Best regards,
Krzysztof
> + };
> };
>
> timer: timer {
> --
> 2.10.2
>
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