linux-kernel - Re: [RESEND PATCH v2] arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Tue, 27 Dec 2016 18:04:26 +0100
From:   Heiko Stuebner <heiko@...ech.de>
To:     Xing Zheng <zhengxing@...k-chips.com>
Cc:     linux-rockchip@...ts.infradead.org, robh+dt@...nel.org,
        mark.rutland@....com, catalin.marinas@....com, will.deacon@....com,
        dianders@...omium.org, wxt@...k-chips.com,
        shawn.lin@...k-chips.com, briannorris@...omium.org,
        jay.xu@...k-chips.com, zhangqing@...k-chips.com,
        david.wu@...k-chips.com, wulf@...k-chips.com,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, dianders@...gle.com,
        frank.wang@...k-chips.com
Subject: Re: [RESEND PATCH v2] arm64: dts: rockchip: add u2phy clock for ehci and ohci of rk3399

Am Mittwoch, 21. Dezember 2016, 18:41:05 CET schrieb Xing Zheng:
> From: William wu <wulf@...k-chips.com>
> 
> We found that the suspend process was blocked when it run into
> ehci/ohci module due to clk-480m of usb2-phy was disabled.
> 
> The root cause is that usb2-phy suspended earlier than ehci/ohci
> (usb2-phy will be auto suspended if no devices plug-in). and the
> clk-480m provided by it was disabled if no module used. However,
> some suspend process related ehci/ohci are base on this clock,
> so we should refer it into ehci/ohci driver to prevent this case.
> 
> The u2phy clock flow like this:
> ===
>       u2phy ________________
> 
>            |                |    |-----> UTMI_CLK ---------> | EHCI |
> 
> OSC_24M ---|---> PHY_PLL----|----|
> 
>            |________^_______|    |-----> 480M_CLK ---|G|---> |
>            |USBPHY_480M_SRC| ----> USBPHY_480M for SoC
>                    GRF
> ===
> 
> Signed-off-by: William wu <wulf@...k-chips.com>
> Signed-off-by: Xing Zheng <zhengxing@...k-chips.com>

applied for 4.11 with Doug's Review-tag


Thanks
Heiko