linux-kernel - Re: [PATCH v4] sparc64: Multi-page size support

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Message-Id: <20161227.123409.1061591712732030012.davem@davemloft.net>
Date:   Tue, 27 Dec 2016 12:34:09 -0500 (EST)
From:   David Miller <davem@...emloft.net>
To:     nitin.m.gupta@...cle.com
Cc:     mike.kravetz@...cle.com, akpm@...ux-foundation.org,
        kirill.shutemov@...ux.intel.com, julian.calaby@...il.com,
        hughd@...gle.com, adam.buchbinder@...il.com, minchan@...nel.org,
        sfr@...b.auug.org.au, paul.gortmaker@...driver.com,
        thomas.tai@...cle.com, chris.hyser@...cle.com,
        atish.patra@...cle.com, mhocko@...e.com,
        sparclinux@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4] sparc64: Multi-page size support

From: Nitin Gupta <nitin.m.gupta@...cle.com>
Date: Tue, 13 Dec 2016 10:03:18 -0800

> +static unsigned int sun4u_huge_tte_to_shift(pte_t entry)
> +{
> +	unsigned long tte_szbits = pte_val(entry) & _PAGE_SZALL_4V;
> +	unsigned int shift;
> +
> +	switch (tte_szbits) {
> +	case _PAGE_SZ256MB_4U:
> +		shift = HPAGE_256MB_SHIFT;
> +		break;

You added all the code necessary to do this on the sun4u chips that support
256MB TTEs, so you might as well enable it in the initialization code.

I'm pretty sure this is an UltraSPARC-IV and later feature.