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Message-ID: <CAFp+6iFUirvZKxJEko+wrmyrowQS7ECqABfgNom=LRb3rkwRcQ@mail.gmail.com>
Date: Thu, 29 Dec 2016 10:35:11 +0530
From: Vivek Gautam <vivek.gautam@...eaurora.org>
To: Stephen Boyd <sboyd@...eaurora.org>
Cc: "robh+dt" <robh+dt@...nel.org>, kishon <kishon@...com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
Mark Rutland <mark.rutland@....com>,
Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v3 3/4] dt-bindings: phy: Add support for QMP phy
On Thu, Dec 29, 2016 at 4:34 AM, Stephen Boyd <sboyd@...eaurora.org> wrote:
> On 12/20, Vivek Gautam wrote:
>> +
>> +Example:
>> + pcie_phy: phy@...00 {
>> + compatible = "qcom,msm8996-qmp-pcie-phy";
>> + reg = <0x034000 0x48f>,
>> + <0x035000 0x5bf>,
>> + <0x036000 0x5bf>,
>> + <0x037000 0x5bf>;
>> + /* tx, rx, pcs */
>> + lane-offsets = <0x0 0x200 0x400>;
>> + #phy-cells = <1>;
>> +
>> + clocks = <&gcc GCC_PCIE_PHY_AUX_CLK>,
>> + <&gcc GCC_PCIE_PHY_CFG_AHB_CLK>,
>> + <&gcc GCC_PCIE_CLKREF_CLK>,
>> + <&gcc GCC_PCIE_0_PIPE_CLK>,
>> + <&gcc GCC_PCIE_1_PIPE_CLK>,
>> + <&gcc GCC_PCIE_2_PIPE_CLK>;
>> + clock-names = "aux", "cfg_ahb", "ref",
>> + "pipe0", "pipe1", "pipe2";
>
> Can we add a #clock-cells = <0> or <1> here given that this is a
> clk provider? We may want to express the clk circular dependency
> between this phy node and GCC via the clocks property at some
> point instead of doing it implicitly via strings in C code.
Sure, will add #clock-cells = <1>.
Although phys like USB and PIPE currently have just the pipe_clk
being controlled by gcc, the UFS phy has tx/rx symbol clocks that
are controlled by gcc but are generated by phy the same way as
pipe_clk.
So, i guess #clock-cells = <1 > makes sense.
Thanks
Vivek
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