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Message-ID: <CACRpkdbR3x14h38Gg7qpeWnswwD9qsS0zDUrrXCEJH-AdEB+cQ@mail.gmail.com>
Date: Fri, 30 Dec 2016 14:28:52 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Andi Shyti <andi.shyti@...sung.com>
Cc: Chanwoo Choi <cw00.choi@...sung.com>,
Tomasz Figa <tomasz.figa@...il.com>,
Krzysztof Kozlowski <krzk@...nel.org>,
Sylwester Nawrocki <s.nawrocki@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>,
Kukjin Kim <kgene@...nel.org>,
Javier Martinez Canillas <javier@....samsung.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
linux-samsung-soc <linux-samsung-soc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
stable <stable@...r.kernel.org>, Andi Shyti <andi@...zian.org>
Subject: Re: [PATCH v2 1/4] pinctrl: samsung: Fix the width of PINCFG_TYPE_DRV
bitfields for Exynos5433
On Fri, Dec 30, 2016 at 5:14 AM, Andi Shyti <andi.shyti@...sung.com> wrote:
> From: Chanwoo Choi <cw00.choi@...sung.com>
>
> This patch fixes the wrong width of PINCFG_TYPE_DRV bitfields for Exynos5433
> because PINCFG_TYPE_DRV of Exynos5433 has 4bit fields in the *_DRV
> registers. Usually, other Exynos have 2bit field for PINCFG_TYPE_DRV.
>
> Fixes: 3c5ecc9ed353 ("pinctrl: exynos: Add support for Exynos5433")
> Cc: stable@...r.kernel.org
> Cc: Tomasz Figa <tomasz.figa@...il.com>
> Cc: Krzysztof Kozlowski <krzk@...nel.org>
> Cc: Sylwester Nawrocki <s.nawrocki@...sung.com>
> Cc: Linus Walleij <linus.walleij@...aro.org>
> Cc: Kukjin Kim <kgene@...nel.org>
> Cc: Javier Martinez Canillas <javier@....samsung.com>
> Signed-off-by: Chanwoo Choi <cw00.choi@...sung.com>
Nominally I think you should sign this off too Andi, as you are in the delivery
path.
Patch applied for fixes.
Yours,
Linus Walleij
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