linux-kernel - Re: [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength macros for Exynos5433

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Message-id: <586600B5.1000903@samsung.com>
Date:   Fri, 30 Dec 2016 15:37:41 +0900
From:   Chanwoo Choi <cw00.choi@...sung.com>
To:     Andi Shyti <andi.shyti@...sung.com>,
        Tomasz Figa <tomasz.figa@...il.com>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        Sylwester Nawrocki <s.nawrocki@...sung.com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Will Deacon <will.deacon@....com>,
        Kukjin Kim <kgene@...nel.org>,
        Javier Martinez Canillas <javier@....samsung.com>,
        Linus Walleij <linus.walleij@...aro.org>
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-samsung-soc@...r.kernel.org, linux-kernel@...r.kernel.org,
        stable@...r.kernel.org, Andi Shyti <andi@...zian.org>
Subject: Re: [PATCH v2 2/4] pinctrl: dt-bindings: samsung: add drive strength
 macros for Exynos5433

Hi Andi,

On 2016년 12월 30일 13:14, Andi Shyti wrote:
> Commit 5db7e3bb87df ("pinctrl: dt-bindings: samsung: Add header with
> values used for configuration") has added a header file for defining the
> pinctrl values in order to avoid hardcoded settings in the Exynos
> DTS related files.
> 
> Extend samsung.h to the Exynos5433 for drive strength values
> which are strictly related to the particular SoC and may defer
> from others.
> 
> Signed-off-by: Andi Shyti <andi.shyti@...sung.com>
> ---
>  include/dt-bindings/pinctrl/samsung.h | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h
> index 6276eb785e2b..e0ebb20ffdd3 100644
> --- a/include/dt-bindings/pinctrl/samsung.h
> +++ b/include/dt-bindings/pinctrl/samsung.h
> @@ -45,6 +45,20 @@
>  #define EXYNOS5420_PIN_DRV_LV3		2
>  #define EXYNOS5420_PIN_DRV_LV4		3
>  
> +/* Drive strengths for Exynos5433 */
> +#define EXYNOS5433_PIN_DRV_FAST_SR1	0
> +#define EXYNOS5433_PIN_DRV_FAST_SR2	1
> +#define EXYNOS5433_PIN_DRV_FAST_SR3	2
> +#define EXYNOS5433_PIN_DRV_FAST_SR4	3
> +#define EXYNOS5433_PIN_DRV_FAST_SR5	4
> +#define EXYNOS5433_PIN_DRV_FAST_SR6	5
> +#define EXYNOS5433_PIN_DRV_SLOW_SR1	8
> +#define EXYNOS5433_PIN_DRV_SLOW_SR2	9
> +#define EXYNOS5433_PIN_DRV_SLOW_SR3	0xa
> +#define EXYNOS5433_PIN_DRV_SLOW_SR4	0xb
> +#define EXYNOS5433_PIN_DRV_SLOW_SR5	0xc
> +#define EXYNOS5433_PIN_DRV_SLOW_SR6	0xf
> +
>  #define EXYNOS_PIN_FUNC_INPUT		0
>  #define EXYNOS_PIN_FUNC_OUTPUT		1
>  #define EXYNOS_PIN_FUNC_2		2
> 

Looks good to me. ('SR' means "Slew Rate".)
Reviewed-by: Chanwoo Choi <cw00.choi@...sung.com>

-- 
Regards,
Chanwoo Choi