lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  PHC 
Open Source and information security mailing list archives
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sat, 31 Dec 2016 13:53:51 +0100
From:   Heiko Stuebner <>
To:     Elaine Zhang <>
Subject: Re: [PATCH v5 3/4] clk: rockchip: add new pll-type for rk3328

Am Donnerstag, 29. Dezember 2016, 10:45:10 CET schrieb Elaine Zhang:
> The rk3328's pll and clock are similar with rk3036's,
> it different with pll_mode_mask, the rk3328 soc
> pll mode only one bit(rk3036 soc have two bits)
> so these should be independent and separate from
> the series of rk3328s.
> Changes in v4:
>   adjust the pacth 3 and 4 order.
>   move pll_rk3328 to patch 3.
> Changes in v3:
>   fix up the pll type pll_rk3328 description and use
> Signed-off-by: Elaine Zhang <>

applied to my clk-branch for 4.11

The clock controller itself also looks good now, I'll just give Rob or someone 
else a bit of time for eventual comments after new years :-)


Powered by blists - more mailing lists