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Message-Id: <1483425255-101923-1-git-send-email-rajatja@google.com>
Date: Mon, 2 Jan 2017 22:34:09 -0800
From: Rajat Jain <rajatja@...gle.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Keith Busch <keith.busch@...el.com>,
Andreas Ziegler <andreas.ziegler@....de>,
Jonathan Yong <jonathan.yong@...el.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
David Daney <david.daney@...ium.com>,
Julia Lawall <Julia.Lawall@...6.fr>,
Ram Amrani <Ram.Amrani@...ium.com>,
Doug Ledford <dledford@...hat.com>,
Wang Sheng-Hui <shhuiw@...mail.com>, linux-pci@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Rajat Jain <rajatja@...gle.com>, Rajat Jain <rajatxjain@...il.com>,
Brian Norris <briannorris@...gle.com>
Subject: [PATCH 0/6] PCI/ASPM: Add PCIe L1 PM substate support
This patchset adds the PCIe L1 PM substate support to the kernel.
The feature is described at:
https://pcisig.com/sites/default/files/specification_documents/ECN_L1_PM_Substates_with_CLKREQ_31_May_2013_Rev10a.pdf
Its all logically one patch (and may be some of them should be
squashed later) , but I've broken down into smaller patches for
ease of review.
This is currently rebased on top of Bjorn's master branch.
Rajat Jain (6):
PCI: Add L1 substate capability structure register definitions
PCI/ASPM: Introduce L1 substates and a Kconfig for it
PCI/ASPM: Read and setup L1 substate capabilities
PCI/ASPM: Calculate and save the L1.2 timing parameters
PCI/ASPM: Actually configure the L1 substate settings to the device
PCI/ASPM: Add comment about L1 substate latency
drivers/pci/pcie/Kconfig | 8 ++
drivers/pci/pcie/aspm.c | 291 ++++++++++++++++++++++++++++++++++++++++--
include/uapi/linux/pci_regs.h | 16 +++
3 files changed, 302 insertions(+), 13 deletions(-)
--
2.8.0.rc3.226.g39d4020
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