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Message-ID: <7b175d65-7193-32e4-999b-e3cdd0005c3a@ti.com>
Date:   Thu, 5 Jan 2017 13:51:50 +0530
From:   Sekhar Nori <nsekhar@...com>
To:     David Lechner <david@...hnology.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Santosh Shilimkar <ssantosh@...nel.org>
CC:     Franklin S Cooper Jr <fcooper@...com>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Kevin Hilman <khilman@...nel.org>,
        Axel Haslam <ahaslam@...libre.com>,
        Alexandre Bailon <abailon@...libre.com>,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Jiri Slaby <jslaby@...e.com>, <linux-serial@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 2/4] serial: 8250: Add new port type for TI
 DA8xx/OMAPL13x/AM17xx/AM18xx/C66x

On Thursday 05 January 2017 02:00 AM, David Lechner wrote:
> This adds a new UART port type for TI DA8xx/OMAPL13x/AM17xx/AM18xx/C66x.

The Keystone2 processors do include the C66x DSP. But the SoCs being
targeted with this patch are the ARM + DSP variants. Using 66AK2x is
more appropriate.

http://www.ti.com/lsds/ti/processors/dsp/c6000_dsp-arm/66ak2x/overview.page

Also, DA8xx includes DA830 which is pin-compatible with AM17x. So you
can shorten the list of supported processors to DA8xx/66AK2x.

> These SoCs have standard 8250 registers plus some extra non-standard
> registers.
> 
> The UART will not function unless the non-standard Power and Emulation
> Management Register (PWREMU_MGMT) is configured correctly. This is
> currently handled in arch/arm/mach-davinci/serial.c for non-device-tree
> boards. Making this part of the UART driver will allow UART to work on
> device-tree boards as well and the mach code can eventually be removed.
> 
> Signed-off-by: David Lechner <david@...hnology.com>

Looks good to me, apart from the minor change above.

Acked-by: Sekhar Nori <nsekhar@...com>

Thanks,
Sekhar

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