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Message-ID: <CAPv3WKdsiGis6gG0SmLT1mg+LYA8i5p4u9KJiYJxng8jrLsj+w@mail.gmail.com>
Date:   Thu, 5 Jan 2017 15:07:02 +0100
From:   Marcin Wojtas <mw@...ihalf.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Chris Packham <Chris.Packham@...iedtelesis.co.nz>,
        Mark Rutland <mark.rutland@....com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Michael Turquette <mturquette@...libre.com>,
        Laxman Dewangan <ldewangan@...dia.com>,
        "linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        Juri Lelli <juri.lelli@....com>,
        Russell King <linux@...linux.org.uk>,
        Thierry Reding <treding@...dia.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Jason Cooper <jason@...edaemon.net>,
        Arnd Bergmann <arnd@...db.de>,
        Kalyan Kinthada <Kalyan.Kinthada@...iedtelesis.co.nz>,
        Rob Herring <robh+dt@...nel.org>,
        Gregory Clement <gregory.clement@...e-electrons.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        Stephen Boyd <sboyd@...eaurora.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        Sudeep Holla <sudeep.holla@....com>
Subject: Re: [PATCHv2 0/5] Support for Marvell switches with integrated CPUs

Hi Andrew,

2017-01-05 14:09 GMT+01:00 Andrew Lunn <andrew@...n.ch>:
>> I'd love to see a switchdev driver but it's a huge task (and no I'm not
>> committing to writing it). As it stands Marvell ship a switch SDK
>> largely executes in userspace with a small kernel module providing some
>> linkage to the underlying hardware.
>
> Is there any similarity to the mv88e6xxx family?

Prestera switches (they are sold as standalone devices and with
integrated CPU's, like ones submitted) are as far from mv88e6xxx as
possible. There are various mix of 1/2.5/10/40G ports, depending on
model.

>
> If it was similar registers, just a different access mechanising, we
> could probably extend the mv88e6xxx to support MMIO as well as MDIO.
>

The difference is huge, nothing existing in the mainline can fit. The
driver, that exposes resources to the userspace SDK (called CPSS, it's
huge and complex piece of code) is existing in Marvell internal
branches (kernel v4.4 is the latest one), but I doubt such solution
(despite it's really small) is upstreamable. I believe it can be
shipped to the customers along with the SDK as a kernel module. Having
the CPU's support in the mainline is IMO sufficient.

Best regards,
Marcin

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