[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20170105171601.us4wffupptilvvqp@lukather>
Date: Thu, 5 Jan 2017 18:16:01 +0100
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Emmanuel Vadot <manu@...ouilliste.com>
Cc: robh+dt@...nel.org, mark.rutland@....com, linux@...linux.org.uk,
wens@...e.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] ARM: dts: sunxi: Enable spi1 and spi2 for Olimex A20 SOM
EVB
Hi,
On Mon, Dec 26, 2016 at 06:53:49PM +0100, Emmanuel Vadot wrote:
> Enable the spi1 and spi2 node since the pins are exposed on the UEXT
> connectors.
>
> Signed-off-by: Emmanuel Vadot <manu@...ouilliste.com>
> ---
> arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
> index 669a1c338c76..fa8c6f60552b 100644
> --- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
> +++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
> @@ -300,12 +300,14 @@
> pinctrl-names = "default";
> pinctrl-0 = <&spi1_pins_a>,
> <&spi1_cs0_pins_a>;
> + status = "okay";
> };
>
> &spi2 {
> pinctrl-names = "default";
> pinctrl-0 = <&spi2_pins_a>,
> <&spi2_cs0_pins_a>;
> + status = "okay";
> };
Those nodes don't exist unfortunately. Maybe you forgot to send one
patch?
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
Download attachment "signature.asc" of type "application/pgp-signature" (802 bytes)
Powered by blists - more mailing lists