linux-kernel - Re: [PATCH v3 3/9] arm64: cpufeature: Cleanup feature bit tables

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Message-ID: <20170105171824.GE29765@e104818-lin.cambridge.arm.com>
Date:   Thu, 5 Jan 2017 17:18:24 +0000
From:   Catalin Marinas <catalin.marinas@....com>
To:     Suzuki K Poulose <suzuki.poulose@....com>
Cc:     linux-arm-kernel@...ts.infradead.org, mark.rutland@....com,
        ryan.arnold@...aro.org, sid@...erved-bit.com, aph@...hat.com,
        will.deacon@....com, linux-kernel@...r.kernel.org,
        adhemerval.zanella@...aro.org, dave.martin@....com
Subject: Re: [PATCH v3 3/9] arm64: cpufeature: Cleanup feature bit tables

On Wed, Jan 04, 2017 at 05:49:01PM +0000, Suzuki K. Poulose wrote:
> This patch does the following clean ups :
> 
> 1) All undescribed fields of a register are now treated as "strict"
>    with a safe value of 0. Hence we could leave an empty table for
>    describing registers which are RAZ.
> 
> 2) ID_AA64DFR1_EL1 is RAZ and should use the table for RAZ register.
> 
> 3) ftr_generic32 is used to represent a register with a 32bit feature
>    value. Rename this to ftr_singl32 to make it more obvious. Since
>    we don't have a 64bit singe feature register, kill ftr_generic.

Nitpick: couple of "single" typos above.

> 
> Based on a patch by Mark Rutland.
> 
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will.deacon@....com>
> Reviewed-by: Mark Rutland <mark.rutland@....com>
> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>

Reviewed-by: Catalin Marinas <catalin.marinas@....com>