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Message-ID: <1ee850ee-f771-1aeb-6b96-dfbe3118f2fc@gmail.com>
Date: Wed, 4 Jan 2017 20:06:49 -0800
From: Florian Fainelli <f.fainelli@...il.com>
To: Chris Packham <chris.packham@...iedtelesis.co.nz>,
linux-arm-kernel@...ts.infradead.org
Cc: Mark Rutland <mark.rutland@....com>, Andrew Lunn <andrew@...n.ch>,
Jason Cooper <jason@...edaemon.net>,
devicetree@...r.kernel.org, Russell King <linux@...linux.org.uk>,
Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
Gregory Clement <gregory.clement@...e-electrons.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: Re: [PATCHv2 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs
Le 01/04/17 à 19:36, Chris Packham a écrit :
> The Marvell 98DX3236, 98DX3336, 98DX4521 and variants are switch ASICs
> with integrated CPUs. They are similar to the Armada XP SoCs but have
> different I/O interfaces.
>
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> ---
> +
> + switch {
> + packet-processor@0 {
> + compatible = "marvell,prestera-98dx4521";
> + };
> + };
This may be a bit premature if you are not providing a binding document
for this sub-node, you might as well add it once you also add a
corresponding driver (or if this will remain out of tree, at least
submitting a separate binding document).
Also, if this node's unit address is 0, you would expect at least a reg
property whose address cell is 0 to be present.
--
Florian
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