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Message-ID: <20170106065947.30631-1-wenyou.yang@atmel.com>
Date: Fri, 6 Jan 2017 14:59:44 +0800
From: Wenyou Yang <wenyou.yang@...el.com>
To: Alexandre Belloni <alexandre.belloni@...e-electrons.com>,
Russell King <linux@....linux.org.uk>,
Nicolas Ferre <nicolas.ferre@...el.com>,
"Rob Herring" <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
CC: <linux-kernel@...r.kernel.org>,
Wenyou Yang <wenyou.yang@...rochip.com>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Wenyou Yang <wenyou.yang@...el.com>
Subject: [PATCH 0/3] ARM: at91: fix cpuidle crash on SAMA5D4 Xplained board
Fix cpuidle crash on SAMA5D4 Xplained board when enable
CONFIG_ARM_AT91_CPUIDLE. Because some SoCs have the L2 cache,
we should flush the L2 cache before entering the cpu idle.
Wenyou Yang (3):
ARM: at91: flush the L2 cache before entering cpu idle
doc: binding: add new compatible for SDRAM/DDR Controller
ARM: dts: at91: use "atmel,sama5d4-ddramc" for ramc
Documentation/devicetree/bindings/arm/atmel-at91.txt | 1 +
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/mach-at91/pm.c | 19 +++++++++++++++++++
drivers/memory/atmel-sdramc.c | 1 +
5 files changed, 23 insertions(+), 2 deletions(-)
--
2.11.0
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