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Message-ID: <f5020a04-5fc7-26b5-1ded-c58e159bc722@codeaurora.org>
Date: Fri, 6 Jan 2017 10:51:53 -0500
From: Christopher Covington <cov@...eaurora.org>
To: Mark Rutland <mark.rutland@....com>
Cc: Paolo Bonzini <pbonzini@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
Christoffer Dall <christoffer.dall@...aro.org>,
Marc Zyngier <marc.zyngier@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will.deacon@....com>, kvm@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, kvmarm@...ts.cs.columbia.edu,
linux-kernel@...r.kernel.org, shankerd@...eaurora.org,
timur@...eaurora.org
Subject: Re: [PATCH v2 4/5] arm64: Use __tlbi_dsb() macros in KVM code
On 01/03/2017 10:57 AM, Mark Rutland wrote:
> On Thu, Dec 29, 2016 at 05:43:34PM -0500, Christopher Covington wrote:
>> Refactor the KVM code to use the newly introduced __tlbi_dsb macros, which
>> will allow an errata workaround that repeats tlbi dsb sequences to only
>> change one location. This is not intended to change the generated assembly
>> and comparing before and after vmlinux objdump shows no functional changes.
@@ -32,7 +33,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
* whole of Stage-1. Weep...
*/
ipa >>= 12;
- asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa));
+ __tlbi_dsb(ipas2e1is, ish, ipa);
/*
* We have to ensure completion of the invalidation at Stage-2,
>> @@ -40,9 +41,7 @@ void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
>> * complete (S1 + S2) walk based on the old Stage-2 mapping if
>> * the Stage-1 invalidation happened first.
>> */
>> - dsb(ish);
>
> Looks like this got accidentally removed. AFAICT it is still necessary.
Not removed, just hoisted above the comment block to the previous patch hunk.
>> - asm volatile("tlbi vmalle1is" : : );
>> - dsb(ish);
>> + __tlbi_dsb(vmalle1is, ish);
>> isb();
Thanks,
Cov
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