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Date:   Mon, 9 Jan 2017 15:42:32 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:     Chen-Yu Tsai <wens@...e.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Icenowy Zheng <icenowy@...c.xyz>
Subject: Re: [PATCH 1/3] pinctrl: sunxi: Add pinctrl variants

On Sun, Jan 8, 2017 at 10:31 PM, Maxime Ripard
<maxime.ripard@...e-electrons.com> wrote:

> Some SoCs are either supposed to be pin compatible (A10 and A20 for
> example), or are just repackaged versions of the same die (A10s, A13, GR8).
>
> In those case, having a full blown pinctrl driver just introduces
> duplication in both data size and maintainance effort.
>
> Add a variant option to both pins and functions to be able to limit the
> pins and functions described only to a subset of the SoC we support with a
> given driver.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@...e-electrons.com>

Patch applied.

Yours,
Linus Walleij

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