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Message-Id: <20170110131510.744181309@linuxfoundation.org>
Date: Tue, 10 Jan 2017 14:37:34 +0100
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Mahesh Kumar <mahesh1.kumar@...el.com>,
Paulo Zanoni <paulo.r.zanoni@...el.com>,
Matt Roper <matthew.d.roper@...el.com>
Subject: [PATCH 4.9 171/206] drm/i915/gen9: fix the WM memory bandwidth WA for Y tiling cases
4.9-stable review patch. If anyone has any objections, please let me know.
------------------
From: Paulo Zanoni <paulo.r.zanoni@...el.com>
commit 2ef32dee97fcf41987722a37eb6ff1a983915e99 upstream.
The previous spec version said "double Ytile planes minimum lines",
and I interpreted this as referring to what the spec calls "Y tile
minimum", but in fact it was referring to what the spec calls "Minimum
Scanlines for Y tile". I noticed that Mahesh Kumar had a different
interpretation, so I sent and email to the spec authors and got
clarification on the correct meaning. Also, BSpec was updated and
should be clear now.
Fixes: ee3d532fcb64 ("drm/i915/gen9: unconditionally apply the memory bandwidth WA")
Cc: stable@...r.kernel.org
Cc: Mahesh Kumar <mahesh1.kumar@...el.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@...el.com>
Reviewed-by: Matt Roper <matthew.d.roper@...el.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1478636531-6081-1-git-send-email-paulo.r.zanoni@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
drivers/gpu/drm/i915/intel_pm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3617,6 +3617,9 @@ static int skl_compute_plane_wm(const st
y_min_scanlines = 4;
}
+ if (apply_memory_bw_wa)
+ y_min_scanlines *= 2;
+
plane_bytes_per_line = width * cpp;
if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
@@ -3637,8 +3640,6 @@ static int skl_compute_plane_wm(const st
plane_blocks_per_line);
y_tile_minimum = plane_blocks_per_line * y_min_scanlines;
- if (apply_memory_bw_wa)
- y_tile_minimum *= 2;
if (fb->modifier[0] == I915_FORMAT_MOD_Y_TILED ||
fb->modifier[0] == I915_FORMAT_MOD_Yf_TILED) {
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