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Date:   Tue, 10 Jan 2017 17:43:11 +0000
From:   Mark Rutland <mark.rutland@....com>
To:     Anurup M <anurupvasu@...il.com>
Cc:     robh+dt@...nel.org, gregkh@...uxfoundation.org,
        catalin.marinas@....com, arnd@...db.de, geert+renesas@...der.be,
        davem@...emloft.net, akpm@...ux-foundation.org, corbet@....net,
        will.deacon@....com, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        anurup.m@...wei.com, zhangshaokun@...ilicon.com,
        tanxiaojun@...wei.com, xuwei5@...ilicon.com,
        sanil.kumar@...ilicon.com, john.garry@...wei.com,
        gabriele.paoloni@...wei.com, shiju.jose@...wei.com,
        wangkefeng.wang@...wei.com, linuxarm@...wei.com,
        shyju.pv@...wei.com
Subject: Re: [PATCH v3 00/10] perf: arm64: Support for Hisilicon SoC Hardware
 event counters

Hi,

On Mon, Jan 02, 2017 at 01:47:52AM -0500, Anurup M wrote:
> ToDo:
> 1) The counter overflow handling is currently unsupported in this
>    patch series.

>From a quick scan of the patches, I see mention of an interrupt in a
comment the driver, but there's noething in the DT binding.

Is there an overflow interrupt at all?

Or do you need to implement polling to avoid overflow?

This is a prerequisite for merging the driver.

Thanks,
Mark.

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