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Message-ID: <c8bbd4a4-2207-44f0-4462-3761c1d6c8a9@gmail.com>
Date:   Fri, 13 Jan 2017 16:27:57 +0100
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     Erin Lo <erin.lo@...iatek.com>
Cc:     srv_heupstream@...iatek.com, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org,
        Dawei Chien <dawei.chien@...iatek.com>
Subject: Re: [PATCH v2 6/6] arm: dts: mt2701: Add thermal device node.



On 13/01/17 09:42, Erin Lo wrote:
> From: Dawei Chien <dawei.chien@...iatek.com>
>
> Add thermal controller device nodes for MT2701.
>
> Signed-off-by: Dawei Chien <dawei.chien@...iatek.com>
> Signed-off-by: Erin Lo <erin.lo@...iatek.com>
> ---
>  arch/arm/boot/dts/mt2701.dtsi | 43 +++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 43 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> index 3847f70..c43d5f8 100644
> --- a/arch/arm/boot/dts/mt2701.dtsi
> +++ b/arch/arm/boot/dts/mt2701.dtsi
> @@ -89,6 +89,36 @@
>  		clock-output-names = "rtc32k";
>  	};
>
> +	thermal-zones {
> +		cpu_thermal: cpu_thermal {
> +			polling-delay-passive = <1000>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +
> +			thermal-sensors = <&thermal 0>;
> +			sustainable-power = <1000>;
> +
> +			trips {
> +				threshold: trip-point@0 {
> +					temperature = <68000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				target: trip-point@1 {
> +					temperature = <85000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +
> +				cpu_crit: cpu_crit@0 {
> +					temperature = <115000>;
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +	};
> +
>  	timer {
>  		compatible = "arm,armv7-timer";
>  		interrupt-parent = <&gic>;
> @@ -270,6 +300,19 @@
>  		status = "disabled";
>  	};
>
> +	thermal: thermal@...0b000 {
> +		#thermal-sensor-cells = <0>;
> +		compatible = "mediatek,mt2701-thermal";
> +		reg = <0 0x1100b000 0 0x1000>;
> +		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_LOW>;
> +		clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> +		clock-names = "therm", "auxadc";
> +		resets = <&pericfg 0x10>;

should be MT2701_PERI_AUXADC_SW_RST, right?

> +		reset-names = "therm";
> +		mediatek,auxadc = <&auxadc>;
> +		mediatek,apmixedsys = <&apmixedsys>;
> +	};
> +
>  	nandc: nfi@...0d000 {
>  		compatible = "mediatek,mt2701-nfc";
>  		reg = <0 0x1100d000 0 0x1000>;
>

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