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Date: Mon, 16 Jan 2017 18:08:21 +0800 From: Chris Zhong <zyw@...k-chips.com> To: dianders@...omium.org, tfiga@...omium.org, heiko@...ech.de, yzq@...k-chips.com, mark.rutland@....com, devicetree@...r.kernel.org, robh+dt@...nel.org, galak@...eaurora.org, pawel.moll@....com, seanpaul@...omium.org Cc: linux-rockchip@...ts.infradead.org, Chris Zhong <zyw@...k-chips.com>, Mark Yao <mark.yao@...k-chips.com>, David Airlie <airlied@...ux.ie>, dri-devel@...ts.freedesktop.org, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org Subject: [PATCH v2 01/11] dt-bindings: add rk3399 support for dw-mipi-rockchip The dw-mipi-dsi of rk3399 is almost the same as rk3288, the rk3399 has additional phy config clock. Signed-off-by: Chris Zhong <zyw@...k-chips.com> --- .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 1753f0c..0f82568 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -5,10 +5,12 @@ Required properties: - #address-cells: Should be <1>. - #size-cells: Should be <0>. - compatible: "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi". + "rockchip,rk3399-mipi-dsi", "snps,dw-mipi-dsi". - reg: Represent the physical address range of the controller. - interrupts: Represent the controller's interrupt to the CPU(s). - clocks, clock-names: Phandles to the controller's pll reference - clock(ref) and APB clock(pclk), as described in [1]. + clock(ref) and APB clock(pclk). For RK3399, a phy config clock + (phy_cfg) is additional required. As described in [1]. - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - ports: contain a port node with endpoint definitions as defined in [2]. For vopb,set the reg = <0> and set the reg = <1> for vopl. -- 2.6.3
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