linux-kernel - Re: [PATCH] coresight: STM: Balance enable/disable

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <CANLsYkwrHiiuH8GLBxV+3cGZn2gkkhAW-Dj8h0xY+ay8HaLgPQ@mail.gmail.com>
Date:   Mon, 16 Jan 2017 10:50:23 -0700
From:   Mathieu Poirier <mathieu.poirier@...aro.org>
To:     Suzuki K Poulose <Suzuki.Poulose@....com>
Cc:     Greg KH <gregkh@...uxfoundation.org>,
        Chunyan Zhang <zhang.chunyan@...aro.org>,
        Pratik Patel <pratikp@...eaurora.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "# 4 . 7" <stable@...r.kernel.org>
Subject: Re: [PATCH] coresight: STM: Balance enable/disable

On 13 January 2017 at 10:11, Suzuki K Poulose <Suzuki.Poulose@....com> wrote:
> On 13/01/17 16:48, Mathieu Poirier wrote:
>>
>> On 10 January 2017 at 04:21, Suzuki K Poulose <suzuki.poulose@....com>
>> wrote:
>>>
>>> The stm is automatically enabled when an application sets the policy
>>> via ->link() call back by using coresight_enable(), which keeps the
>>> refcount of the current users of the STM. However, the unlink() callback
>>> issues stm_disable() directly, which leaves the STM turned off, without
>>> the coresight layer knowing about it. This prevents any further uses
>>> of the STM hardware as the coresight layer still thinks the STM is
>>> turned on and doesn't issue an stm_enable(). Even manually enabling
>>> the STM via sysfs can't really enable the hw.
>>>
> ...
>>>
>>>
>>> This patch balances the unlink operation by using the
>>> coresight_disable(),
>>> keeping the coresight layer in sync with the hardware state.
>>>
>>> Fixes: commit 237483aa5cf43 ("coresight: stm: adding driver for CoreSight
>>> STM component")
>>> Cc: Pratik Patel <pratikp@...eaurora.org>
>>> Cc: Mathieu Poirier <mathieu.poirier@...aro.org>
>>> Cc: Chunyan Zhang <zhang.chunyan@...aro.org>
>>> Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
>>> Cc: stable@...r.kernel.org # 4.7+
>>> Reported-by: Robert Walker <robert.walker@....com>
>>> Signed-off-by: Suzuki K Poulose <suzuki.poulose@....com>
>>> ---
>>>  drivers/hwtracing/coresight/coresight-stm.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/hwtracing/coresight/coresight-stm.c
>>> b/drivers/hwtracing/coresight/coresight-stm.c
>>> index 3524452..57b7330 100644
>>> --- a/drivers/hwtracing/coresight/coresight-stm.c
>>> +++ b/drivers/hwtracing/coresight/coresight-stm.c
>>> @@ -356,7 +356,7 @@ static void stm_generic_unlink(struct stm_data
>>> *stm_data,
>>>         if (!drvdata || !drvdata->csdev)
>>>                 return;
>>>
>>> -       stm_disable(drvdata->csdev, NULL);
>>> +       coresight_disable(drvdata->csdev);
>>>  }
>>>
>>>  static phys_addr_t
>>
>>
>> Applied - thanks,
>
>
> Mathieu, Greg,
>
> I think this should go into 4.10 (either way, as fix in this cycle or via
> stable after the release). I think
> it would be easier if it goes in as fix during one of these rc cycle.
>
> Please let me know your thoughts.

I'm good with squeezing this patch in the 4.10 cycle.  From here I
suppose the easiest for Greg is for you to send another patch with
Chunyan's Reviewed-by and my ack.

>
> Suzuki
>
>> Mathieu
>>
>>> --
>>> 2.7.4
>>>
>