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Message-ID: <1484593718.2133.156.camel@linux.intel.com>
Date: Mon, 16 Jan 2017 21:08:38 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: Jan Kiszka <jan.kiszka@...mens.com>,
Mark Brown <broonie@...nel.org>
Cc: linux-spi@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Daniel Mack <daniel@...que.org>,
Haojian Zhuang <haojian.zhuang@...il.com>,
Robert Jarzmik <robert.jarzmik@...e.fr>,
linux-kernel@...r.kernel.org,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Sascha Weisenberger <sascha.weisenberger@...mens.com>
Subject: Re: [PATCH v2 3/3] spi: pca2xx-pci: Allow MSI
On Mon, 2017-01-16 at 19:44 +0100, Jan Kiszka wrote:
> Now that the core is ready for edge-triggered interrupts, we can
> safely
> allow the PCI versions that provide this to enable the feature and,
> thus, have less shared interrupts.
>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> drivers/spi/spi-pxa2xx-pci.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-
> pci.c
> index 58d2d48..58dcadb 100644
> --- a/drivers/spi/spi-pxa2xx-pci.c
> +++ b/drivers/spi/spi-pxa2xx-pci.c
> @@ -203,10 +203,16 @@ static int pxa2xx_spi_pci_probe(struct pci_dev
> *dev,
> ssp = &spi_pdata.ssp;
> ssp->phys_base = pci_resource_start(dev, 0);
> ssp->mmio_base = pcim_iomap_table(dev)[0];
> - ssp->irq = dev->irq;
> ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
> ssp->type = c->type;
>
> + pci_set_master(dev);
> +
> + ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
> + if (ret < 0)
> + return ret;
+ perhaps an empty line?
> + ssp->irq = pci_irq_vector(dev, 0);
> +
> snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
> ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
c->max_clk_rate);
--
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy
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