linux-kernel - Re: [PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth of some panel

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Message-ID: <20170117105450.360c6c69.john@metanate.com>
Date:   Tue, 17 Jan 2017 10:54:50 +0000
From:   John Keeping <john@...anate.com>
To:     Chris Zhong <zyw@...k-chips.com>
Cc:     dianders@...omium.org, tfiga@...omium.org, heiko@...ech.de,
        yzq@...k-chips.com, mark.rutland@....com,
        devicetree@...r.kernel.org, robh+dt@...nel.org,
        galak@...eaurora.org, pawel.moll@....com, seanpaul@...omium.org,
        David Airlie <airlied@...ux.ie>, linux-kernel@...r.kernel.org,
        dri-devel@...ts.freedesktop.org,
        linux-rockchip@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org,
        Mark Yao <mark.yao@...k-chips.com>
Subject: Re: [PATCH v2 11/11] drm/rockchip/dsi: fix insufficient bandwidth
 of some panel

On Tue, 17 Jan 2017 17:31:53 +0800, Chris Zhong wrote:

> On 01/16/2017 08:44 PM, John Keeping wrote:
> > On Mon, 16 Jan 2017 18:08:31 +0800, Chris Zhong wrote:
> >  
> >> Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough
> >> for some panel, it will cause the screen display is not normal, so
> >> increases the badnwidth to 1 / 0.8.
> >>
> >> Signed-off-by: Chris Zhong <zyw@...k-chips.com>
> >>
> >> ---
> >>
> >>   drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++--
> >>   1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> >> index 9dfa73d..5a973fe 100644
> >> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> >> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> >> @@ -501,8 +501,8 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi)
> >>   
> >>   	mpclk = DIV_ROUND_UP(dsi->mode->clock, MSEC_PER_SEC);
> >>   	if (mpclk) {
> >> -		/* take 1 / 0.9, since mbps must big than bandwidth of RGB */
> >> -		tmp = mpclk * (bpp / dsi->lanes) * 10 / 9;
> >> +		/* take 1 / 0.8, since mbps must big than bandwidth of RGB */
> >> +		tmp = mpclk * (bpp / dsi->lanes) * 10 / 8;  
> > This and patch 9 are just hacking around the underlying problem in order
> > to make particular panels work.  I'm pretty sure the actual issue is the
> > use of hardcoded values when configuring the PHY, since the PHY
> > parameters are specified in clock cycles but the MIPI spec requires
> > absolute time durations.
> >
> > I posted a series addressing this a while ago, although I screwed up
> > sending it so some patches were included twice and since no one
> > expressed any interest I didn't post a cleaned up version.
> >
> > The relevant patch is here:
> >
> > https://patchwork.kernel.org/patch/9340193/  
> 
> Thanks very much, your patches are very useful for me. It looks your 
> method is correct.
> And I am very confused why Mark Yao and me did not receive your patches 
> before,
> although we have subscribed the <linux-rockchip@...ts.infradead.org>.
> 
> In addition, could you tell me which device ware you testing with these 
> mipi patches.
> I going to test them these day.

I'm using RK3288 and I tested my patches with three different MIPI
displays, two of which require commands to be sent in order to set up
the panel.

Thanks for testing the patches.


John