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Message-ID: <dd80a861-4732-73fb-6d66-b74031925d1b@caviumnetworks.com>
Date:   Tue, 17 Jan 2017 15:13:41 +0100
From:   Tomasz Nowicki <tnowicki@...iumnetworks.com>
To:     Eric Auger <eric.auger@...hat.com>, <eric.auger.pro@...il.com>,
        <christoffer.dall@...aro.org>, <marc.zyngier@....com>,
        <robin.murphy@....com>, <alex.williamson@...hat.com>,
        <will.deacon@....com>, <joro@...tes.org>, <tglx@...utronix.de>,
        <jason@...edaemon.net>, <linux-arm-kernel@...ts.infradead.org>
CC:     <drjones@...hat.com>, <kvm@...r.kernel.org>,
        <punit.agrawal@....com>, <linux-kernel@...r.kernel.org>,
        <geethasowjanya.akula@...il.com>, <diana.craciun@....com>,
        <iommu@...ts.linux-foundation.org>,
        <pranav.sawargaonkar@...il.com>, <bharat.bhushan@....com>,
        <shankerd@...eaurora.org>, <gpkulkarni@...il.com>
Subject: Re: [PATCH v8 11/18] iommu/arm-smmu-v3: Implement reserved region
 get/put callbacks

On 11.01.2017 10:41, Eric Auger wrote:
> iommu/arm-smmu: Implement reserved region get/put callbacks
>
> The get() populates the list with the MSI IOVA reserved window.
>
> At the moment an arbitray MSI IOVA window is set at 0x8000000
> of size 1MB. This will allow to report those info in iommu-group
> sysfs.
>
> Signed-off-by: Eric Auger <eric.auger@...hat.com>
> Acked-by: Will Deacon <will.deacon@....com>

Reviewed-by: Tomasz Nowicki <tomasz.nowicki@...iumnetworks.com>

Thanks,
Tomasz

>
> ---
>
> v7 -> v8:
> - added Will's A-b
>
> v4: creation
> ---
>  drivers/iommu/arm-smmu-v3.c | 28 ++++++++++++++++++++++++++++
>  1 file changed, 28 insertions(+)
>
> diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> index 4d6ec44..6c4111c 100644
> --- a/drivers/iommu/arm-smmu-v3.c
> +++ b/drivers/iommu/arm-smmu-v3.c
> @@ -412,6 +412,9 @@
>  /* High-level queue structures */
>  #define ARM_SMMU_POLL_TIMEOUT_US	100
>
> +#define MSI_IOVA_BASE			0x8000000
> +#define MSI_IOVA_LENGTH			0x100000
> +
>  static bool disable_bypass;
>  module_param_named(disable_bypass, disable_bypass, bool, S_IRUGO);
>  MODULE_PARM_DESC(disable_bypass,
> @@ -1883,6 +1886,29 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
>  	return iommu_fwspec_add_ids(dev, args->args, 1);
>  }
>
> +static void arm_smmu_get_resv_regions(struct device *dev,
> +				      struct list_head *head)
> +{
> +	struct iommu_resv_region *region;
> +	int prot = IOMMU_WRITE | IOMMU_NOEXEC | IOMMU_MMIO;
> +
> +	region = iommu_alloc_resv_region(MSI_IOVA_BASE, MSI_IOVA_LENGTH,
> +					 prot, IOMMU_RESV_MSI);
> +	if (!region)
> +		return;
> +
> +	list_add_tail(&region->list, head);
> +}
> +
> +static void arm_smmu_put_resv_regions(struct device *dev,
> +				      struct list_head *head)
> +{
> +	struct iommu_resv_region *entry, *next;
> +
> +	list_for_each_entry_safe(entry, next, head, list)
> +		kfree(entry);
> +}
> +
>  static struct iommu_ops arm_smmu_ops = {
>  	.capable		= arm_smmu_capable,
>  	.domain_alloc		= arm_smmu_domain_alloc,
> @@ -1898,6 +1924,8 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args)
>  	.domain_get_attr	= arm_smmu_domain_get_attr,
>  	.domain_set_attr	= arm_smmu_domain_set_attr,
>  	.of_xlate		= arm_smmu_of_xlate,
> +	.get_resv_regions	= arm_smmu_get_resv_regions,
> +	.put_resv_regions	= arm_smmu_put_resv_regions,
>  	.pgsize_bitmap		= -1UL, /* Restricted during device attach */
>  };
>
>

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