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Message-ID: <alpine.DEB.2.20.1701171847560.3495@nanos>
Date:   Tue, 17 Jan 2017 18:51:06 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Borislav Petkov <bp@...en8.de>
cc:     X86 ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 02/13] x86/microcode: Use own MSR accessors

On Tue, 17 Jan 2017, Borislav Petkov wrote:
> diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h
> index 38711df3bcb5..fbecea6e46e2 100644
> --- a/arch/x86/include/asm/microcode.h
> +++ b/arch/x86/include/asm/microcode.h
> @@ -5,20 +5,33 @@
>  #include <linux/earlycpio.h>
>  #include <linux/initrd.h>
>  
> -#define native_rdmsr(msr, val1, val2)			\
> +static inline unsigned long long __rdmsr(unsigned int msr)
> +{
> +	DECLARE_ARGS(val, low, high);
> +
> +	asm volatile("1: rdmsr\n"
> +		     "2:\n"
> +		     : EAX_EDX_RET(val, low, high) : "c" (msr));
> +	return EAX_EDX_VAL(val, low, high);
> +}
> +
> +#define microcode_rdmsr(msr, val1, val2)		\
>  do {							\
> -	u64 __val = native_read_msr((msr));		\
> +	u64 __val = __rdmsr((msr));			\
>  	(void)((val1) = (u32)__val);			\
>  	(void)((val2) = (u32)(__val >> 32));		\
>  } while (0)
>  
> -#define native_wrmsr(msr, low, high)			\
> -	native_write_msr(msr, low, high)
> +static inline void microcode_wrmsr(unsigned int msr, u64 val)
> +{
> +	u32 low, high;
> +
> +	low  = (u32)val;
> +	high = (u32)(val >> 32);
>  
> -#define native_wrmsrl(msr, val)				\
> -	native_write_msr((msr),				\
> -			 (u32)((u64)(val)),		\
> -			 (u32)((u64)(val) >> 32))
> +	asm volatile("wrmsr\n"
> +		     :: "c" (msr), "a"(low), "d" (high) : "memory");
> +}

msr.h already has:

wrmsr_notrace() so adding wrmsrl_notrace() to it should be a nobrainer.

Providing rdmsr_notrace() in msr.h is a natural extension of the existing
interfaces.

That would get rid of all the extra microcode specific MSR accessors which
are just yet another copy of stuff in msr.h.

Thanks,

	tglx

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