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Message-Id: <20170117231421.16310-1-paul@crapouillou.net>
Date:   Wed, 18 Jan 2017 00:14:08 +0100
From:   Paul Cercueil <paul@...pouillou.net>
To:     Linus Walleij <linus.walleij@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Boris Brezillon <boris.brezillon@...e-electrons.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
        Maarten ter Huurne <maarten@...ewalker.org>,
        Lars-Peter Clausen <lars@...afoo.de>,
        Paul Burton <paul.burton@...tec.com>
Cc:     linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mips@...ux-mips.org,
        linux-mmc@...r.kernel.org, linux-mtd@...ts.infradead.org,
        linux-pwm@...r.kernel.org, linux-fbdev@...r.kernel.org,
        james.hogan@...tec.com
Subject: [PATCH 00/13] Ingenic JZ4740 / JZ4780 pinctrl driver

Hi,

This set of patches introduces a new pinctrl driver for the Ingenic
JZ4740 and JZ4780, which handles pin configuration, pin muxing and
GPIO config for those MIPS SoCs.

The initial driver was developed by to Paul Burton, so I'll expect his
Signed-Off-By to be added to each patch. It has been severely modified
and improved by myself, notably to add support for the JZ4740 (the
initial non-upstream driver only handled the JZ4780).

I successfully tested it on Imagination Technologies' CI20 board (JZ4780),
as well as on the Dingoo A320 chinese handheld console (JZ4740).

One patch in this series add a pinctrl configuration for some drivers
instanciated in the QI LB60 devicetree. Since I don't own this device,
this one patch was not tested.

Some words about the driver itself:
- pinctrl-ingenic.c contains the core functions that can be shared
  across all Ingenic SoCs,
- pinctrl-jz4740.c contains the JZ4740-specific low-level functions and
  the jz4740-pinctrl driver,
- pinctrl-jz4780.c contains the JZ4780-specific low-level functions and
  the jz4780-pinctrl driver.

The reason behind using a common file sharing core functions and backend
ops for each SoC version, is that the pin/GPIO controllers of the Ingenic
SoCs are extremely similar across SoC versions, except that some have the
registers shuffled around. Making a distinct separation permits the reuse
of large parts of the driver to support the two SoC versions.

One problem still unresolved: the pinctrl framework does not allow us to
configure each pin on demand (someone please prove me wrong), when the
various PWM channels are requested or released. For instance, the PWM
channels can be configured from sysfs, which would require all PWM pins
to be configured properly beforehand for the PWM function, eventually
causing conflicts with other platform or board drivers.

The proper solution here would be to modify the pwm-jz4740 driver to
handle only one PWM channel, and create an instance of this driver
for each one of the 8 PWM channels. Then, it could use the pinctrl
framework to dynamically configure the PWM pin it controls.

Until this can be done, the only jz4740 board supported upstream
(Qi lb60) could configure all of its connected PWM pins in PWM function
mode, if those are not used by other drivers nor by GPIOs on the
board. The only jz4780 board upstream (CI20) does not yet support the
PWM driver.


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