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Message-Id: <20170117231421.16310-9-paul@crapouillou.net>
Date: Wed, 18 Jan 2017 00:14:16 +0100
From: Paul Cercueil <paul@...pouillou.net>
To: Linus Walleij <linus.walleij@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Ralf Baechle <ralf@...ux-mips.org>,
Ulf Hansson <ulf.hansson@...aro.org>,
Boris Brezillon <boris.brezillon@...e-electrons.com>,
Thierry Reding <thierry.reding@...il.com>,
Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>,
Maarten ter Huurne <maarten@...ewalker.org>,
Lars-Peter Clausen <lars@...afoo.de>,
Paul Burton <paul.burton@...tec.com>
Cc: linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-mips@...ux-mips.org,
linux-mmc@...r.kernel.org, linux-mtd@...ts.infradead.org,
linux-pwm@...r.kernel.org, linux-fbdev@...r.kernel.org,
james.hogan@...tec.com, Paul Cercueil <paul@...pouillou.net>
Subject: [PATCH 08/13] MIPS: JZ4780: CI20: Add pinctrl configuration for several drivers
We set the pin configuration for the jz4780-nand and jz4780-uart
drivers.
Signed-off-by: Paul Cercueil <paul@...pouillou.net>
---
arch/mips/boot/dts/ingenic/ci20.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 1652d8d60b1e..e2cd3ebb7be8 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -29,18 +29,30 @@
&uart0 {
status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart0_data>;
};
&uart1 {
status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart1_data>;
};
&uart3 {
status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart2_dataplusflow>;
};
&uart4 {
status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_uart4_data>;
};
&nemc {
@@ -61,6 +73,16 @@
ingenic,nemc-tAW = <15>;
ingenic,nemc-tSTRV = <100>;
+ /*
+ * Only CLE/ALE are needed for the devices that are connected, rather
+ * than the full address line set.
+ */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_nemc_data
+ &pins_nemc_cle_ale
+ &pins_nemc_rd_we
+ &pins_nemc_frd_fwe>;
+
nand@1 {
reg = <1>;
@@ -69,6 +91,9 @@
nand-ecc-mode = "hw";
nand-on-flash-bbt;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pins_nemc_cs1>;
+
partitions {
compatible = "fixed-partitions";
#address-cells = <2>;
--
2.11.0
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