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Message-ID: <CACRpkdbfkpdYU7knh3Wo5KW0_w-q+o7J3kz1BLfap-fRYAgmaw@mail.gmail.com>
Date:   Wed, 18 Jan 2017 10:26:39 +0100
From:   Linus Walleij <linus.walleij@...aro.org>
To:     Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc:     Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
        "David E . Box" <david.e.box@...ux.intel.com>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v2 3/6] pinctrl: Add a possibility to configure pins from
 a gpiolib based drivers

On Fri, Jan 13, 2017 at 5:33 PM, Mika Westerberg
<mika.westerberg@...ux.intel.com> wrote:
> On Fri, Jan 13, 2017 at 04:36:42PM +0100, Linus Walleij wrote:
>> On Thu, Jan 12, 2017 at 10:22 AM, Mika Westerberg
>> <mika.westerberg@...ux.intel.com> wrote:
>>
>> > Hmm, looking at users of .set_debounce() I can see that the debounce
>> > time can be quite large. For example some signals which are connected to
>> > physical push-buttons may need > 64ms debounce time.
>> >
>> > However, the current pinconfig value is defined to be unsigned long
>> > which on 32-bit architecture is 32-bits. From that the higher 16-bits
>> > are used as config leaving the value to be 16-bits. This gives maximum
>> > debounce time of 65535us. I don't think it can cover all the uses of
>> > .set_debounce(). This could also be problematic when specifying values
>> > for pull resistors.
>> >
>> > One solution is to convert the packed value to be u64 instead, leaving
>> > up to 48-bits for the value. Alternatively we could provide a scale
>> > field with the packed format.
>>
>> Hm yeah as long as all in-kernel users survive I don't see why we
>> couldn't just make it 64bit. Is it a big deal?
>
> As long as everyone is using those macros and inline functions from
> pinconf-generic.h, I think the conversion should be pretty
> straightforward.

I think I just make it a strict requirement that if people want to use
the pinctrl back-end for GPIO they simply have to support generic
pin control. It's not like they have something else already, and
converting a driver is not any unreasonable amount of work.

Yours,
Linus Walleij

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